Owners manual

H3
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 48
8.9.4.25. Receive DMA Current Descriptor Register(Default Value: 0x00000000) ................................ 584
8.9.4.26. Receive DMA Current Buffer Address Register(Default Value: 0x00000000) ......................... 584
8.9.4.27. RGMII Status Register(Default Value: 0x00000000)................................................................ 584
8.9.5. EMAC RX/TX Descriptor..................................................................................................................... 584
8.9.5.1. Transmit Descriptor ................................................................................................................... 585
8.9.5.2. Receive Descriptor .................................................................................................................... 586
8.10. TSC ............................................................................................................................................................. 589
8.10.1. Overview ........................................................................................................................................... 589
8.10.2. Transport Stream Input Timing Diagram ........................................................................................... 590
8.10.3. Transport Stream Controller Register List ......................................................................................... 592
8.10.4. Transport Stream Controller Register Description ............................................................................ 593
8.10.4.1. TSC Control Register(Default Value: 0x00000000) .................................................................. 593
8.10.4.2. TSC Status Register(Default Value: 0x00000000) .................................................................... 593
8.10.4.3. TSC Port Control Register(Default Value: 0x00000000) ........................................................... 593
8.10.4.4. TSC Port Parameter Register(Default Value: 0x00000000) ...................................................... 593
8.10.4.5. TSC TSF Input Multiplex Control Register(Default Value: 0x00000000) .................................. 594
8.10.4.6. TSC Port Output Multiplex Control Register(Default Value: 0x00000000) .............................. 594
8.10.4.7. TSC Port Output Multiplex Control Register(Default Value: 0x00000000) .............................. 594
8.10.4.8. TSG Packet Parameter Register(Default Value: 0x00470000) .................................................. 595
8.10.4.9. TSG Interrupt Enable and Status Register(Default Value: 0x00000000) .................................. 596
8.10.4.10. TSG Clock Control Register(Default Value: 0x00000000) ...................................................... 597
8.10.4.11. TSG Buffer Base Address Register(Default Value: 0x00000000) ............................................ 597
8.10.4.12. TSG Buffer Size Register(Default Value: 0x00000000) ........................................................... 597
8.10.4.13. TSG Buffer Point Register(Default Value: 0x00000000) ......................................................... 598
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