Owners manual

Interfaces
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 517
14:2
Reserved
1
R
R/W
0x0
OverCurrentIndicator
This bit reports overcurrent conditions when the global reporting is
implemented. When set, an overcurrent condition exists. When cleared,
all power operations are normal.
If per-port overcurrent protection is implemented this bit is always ‘0’
0
R/W
R
0x0
(Read)LocalPowerStatus
When read, this bit returns the LocalPowerStatus of the Root Hub. The
Root Hub does not support the local power status feature; thus, this bit is
always read as ‘0’.
(Write)ClearGlobalPower
When write, this bit is operated as the ClearGlobalPower. In global power
mode (PowerSwitchingMode=0), This bit is written to ‘1’ to turn off
power to all ports (clear PortPowerStatus). In per-port power mode, it
clears PortPowerStatus only on ports whose PortPowerControlMask bit is
not set. Writing a ‘0’ has no effect.
8.5.2.6.22. HcRhPortStatus Register(Default Value: 0x00000100)
Offset: 0x454
Register Name: HcRhPortStatus
Bit
Read/Write
Default/Hex
Description
HCD
HC
31:21
/
/
0x0
Reserved
20
R/W
R/W
0x0
PortResetStatusChange
This bit is set at the end of the 10-ms port reset signal. The HCD writes a
‘1’ to clear this bit. Writing a ‘0’ has no effect.
0
port reset is not complete
1
port reset is complete
19
R/W
R/W
0x0
PortOverCurrentIndicatorChange
This bit is valid only if overcurrent conditions are reported on a per-port
basis. This bit is set when Root Hub changes the
PortOverCurrentIndicator bit. The HCD writes a ‘1’ to clear this bit.
Writing a ‘0’ has no effect.
0
no change in PortOverCurrentIndicator
1
PortOverCurrentIndicator has changed
18
R/W
R/W
0x0
PortSuspendStatusChange
This bit is set when the full resume sequence has been completed. This
sequence includes the 20-s resume pulse, LS EOP, and 3-ms
resychronization delay. The HCD writes a ‘1’ to clear this bit. Writing a ‘0’
has no effect. This bit is also cleared when ResetStatusChange is set.
0
resume is not completed
1
resume completed
17
R/W
R/W
0x0
PortEnableStatusChange
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