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H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 530
8.6.7.2. I2S/PCM Format Register0 (Default Value: 0x00000033)
Offset: 0x04
Register Name: I2S/PCM_FMT0
Bit
R/W
Default/Hex
Description
31
R/W
0
SDI_SYNC_SEL
0: SDI use LRCK
1: SDI use LRCKR
30
R/W
0
LRCK_WIDTH
(only apply in PCM mode ) LRCK width
0: LRCK = 1 BCLK width (short frame)
1: LRCK = 2 BCLK width (long frame)
29:20
R/W
0
LRCKR_PERIOD
It is used to program the number of BCLKs per channel of sample frame.
This value is interpreted as follow:
PCM mode: Number of BCLKs within (Left + Right) channel width
I2S / Left-Justified / Right-Justified mode: Number of BCLKs within each
individual channel width (Left or Right)
N+1
For example:
n = 7: 8 BCLK width
…
n = 1023: 1024 BCLKs width
19
R/W
0
LRCK_POLARITY/LRCKR_POLARITY
When apply in I2S / Left-Justified / Right-Justified mode:
0: Left channel when LRCK is low
1: Left channel when LRCK is high
When apply in PCM mode:
0: PCM LRCK/LRCKR asserted at the negative edge
1: PCM LRCK/LRCKR asserted at the positive edge
18
/
/
/
17:8
R/W
0
LRCK_PERIOD
It is used to program the number of BCLKs per channel of sample frame.
This value is interpreted as follow:
PCM mode: Number of BCLKs within (Left + Right) channel width
I2S / Left-Justified / Right-Justified mode: Number of BCLKs within each
individual channel width (Left or Right)
N+1
For example:
n = 7: 8 BCLK width
…
n = 1023: 1024 BCLKs width
7
R/W
0
BCLK_POLARITY
0: normal mode, negative edge drive and positive edge sample
1: invert mode, positive edge drive and negative edge sample
6:4
R/W
3
SR
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