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H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 537
3: Divide by 4
4: Divide by 6
5: Divide by 8
6: Divide by 12
7: Divide by 16
8: Divide by 24
9: Divide by 32
10: Divide by 48
11: Divide by 64
12: Divide by 96
13: Divide by 128
14: Divide by 176
15: Divide by 192
8.6.7.11. I2S/PCM TX Counter Register(Default Value: 0x00000000)
Offset: 0x28
Register Name: I2S/PCM_TXCNT
Bit
R/W
Default/Hex
Description
31:0
R/W
0
TX_CNT
TX Sample Counter
The audio sample number of sending into TXFIFO. When one sample is put
into TXFIFO by DMA or by host IO, the TX sample counter register increases
by one. The TX sample counter register can be set to any initial valve at any
time. After been updated by the initial value, the counter register should
count on base of this initial value.
8.6.7.12. I2S/PCM RX Counter Register(Default Value: 0x00000000)
Offset: 0x2C
Register Name: I2S/PCM_RXCNT
Bit
R/W
Default/Hex
Description
31:0
R/W
0
RX_CNT
RX Sample Counter
The audio sample number of writing into RXFIFO. When one sample is
written by Digital Audio Engine, the RX sample counter register increases by
one. The RX sample counter register can be set to any initial valve at any
time. After been updated by the initial value, the counter register should
count on base of this initial value.
8.6.7.13. I2S/PCM Channel Configuration Register(Default Value: 0x00000000)
Offset: 0x30
Register Name: I2S/PCM_CHCFG
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