Owners manual

Interfaces
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 564
23
R/W
0
SCDEA
Smart Card Deactivation Interrupt. When enabled, this interrupt is asserted
after the Smart Card deactivation sequence is complete.
22
R/W
0
SCACT
Smart Card Activation Interrupt. When enabled, this interrupt is asserted
after the Smart Card activation sequence is complete.
21
R/W
0
SCINS
Smart Card Inserted Interrupt. When enabled, this interrupt is asserted
after the smart card insertion.
20
R/W
0
SCREM
Smart Card Removed Interrupt. When enabled, this interrupt is asserted
after the smart card removal.
19
R/W
0
ATRDONE
ATR Done Interrupt. When enabled, this interrupt is asserted after the ATR
sequence is successfully completed.
18
R/W
0
ATRFAIL
ATR Fail Interrupt. When enabled, this interrupt is asserted if the ATR
sequence fails.
17
R/W
0
C2CFULL
Two Consecutive Characters Limit Interrupt. When enabled, this interrupt
is asserted if the time between two consecutive characters, transmitted
between the Smart Card and the Reader in both directions, is equal the
Two Characters Delay Limit described below. The C2CFULL interrupt is
internally enabled from the ATR start to the deactivation or ATR restart
initialization. It is recommended to use this counter to detect unresponsive
Smart Cards.
16
R/W
0
CLKSTOPRUN
Smart Card Clock Stop/Run Interrupt. When enabled, this interrupt is
asserted in two cases:
 When the smart card clock is stopped.
 When the new character can be started after the clock restart.
To distinguish between the two interrupt cases, we recommend reading
the CLKSTOP bit in SCR_CTRL1 register.
15:13
/
/
/
12
R/W
0
RXPERR
RX Parity Error Interrupt. When enabled, this interrupt is asserted after the
character with wrong parity was received when the number of repeated
receptions exceeds RXREPEAT value or T=1 protocol is used.
11
R/W
0
RXDONE
RX Done Interrupt. When enabled, this interrupt is asserted after a
character was received from the Smart Card.
10
R/W
0
RXFIFOTHD
RX FIFO Threshold Interrupt. When enabled, this interrupt is asserted if the
number of bytes in RX FIFO is equal or exceeds the RX FIFO threshold.
9
R/W
0
RXFIFOFULL
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