Owners manual

Interfaces
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 575
1: Enable transmit timeout interrupt
2
R/W
0
TX_BUF_UA_INT_EN
0: Disable transmit buffer available interrupt
1: Enable transmit buffer available interrupt
1
R/W
0
TX_DMA_STOPPED_INT_EN
0: Disable transmit DMA FSM stopped interrupt
1: Enable transmit DMA FSM stopped interrupt
0
R/W
0
TX_INT_EN
0: Disable transmit interrupt
1: Enable transmit interrupt
8.9.4.5. Transmit Control 0 Register(Default Value: 0x00000000)
Offset: 0x10
Register Name: TX_CTL_0
Bit
R/W
Default/Hex
Description
31
R/W
0
TX_EN
Enable transmitter.
0: Disable transmitter after current transmission
1: Enable
30
R/W
0
TX_FRM_LEN_CTL
0: Allow to transmit frames no more than 2,048 bytes (10,240 if
JUMBO_FRM_EN is set) and cut off any bytes after that
1:Allow to transmit frames of up to 16,384 bytes
29:0
/
/
/
8.9.4.6. Transmit Control 1 Register(Default Value: 0x00000000)
Offset: 0x14
Register Name: TX_CTL_1
Bit
R/W
Default/Hex
Description
31
R/W
0
TX_DMA_START
When set this bit, the TX DMA FSM will go no to work. It is cleared internally
and always read a 0.
30
R/W
0
TX_DMA_EN
0: Stop TX DMA after the completion of current frame transmission.
1: Start and run TX DMA.
29:11
/
/
/
10:8
R/W
0
TX_TH
The threshold value of TX DMA FIFO. When TX_MD is 0, transmission starts
when the size of frame in TX DMA FIFO is greater than the threshold. In
addition, full frames with a length less than the threshold are transferred
automatically.
000: 64
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