Owners manual

Interfaces
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 593
TSF_CBWPR
TSF + 0x58
TSF Channel Buffer Write Pointer Register
TSF_CBRPR
TSF + 0x5c
TSF Channel Buffer Read Pointer Register
TSD_CTLR
TSD + 0x00
TSD Control Register
TSD_STAR
TSD + 0x04
TSD Status Register
TSD_CWIR
TSD + 0x1c
TSD Control Word Index Register
TSD_CWR
TSD + 0x20
TSD Control Word Register
8.10.4. Transport Stream Controller Register Description
8.10.4.1. TSC Control Register(Default Value: 0x00000000)
Offset: 0x00
Register Name: TSC_CTLR
Bit
R/W
Default/Hex
Description
31:0
/
/
/
8.10.4.2. TSC Status Register(Default Value: 0x00000000)
Offset: 0x04
Register Name: TSC_STAR
Bit
R/W
Default/Hex
Description
31:0
/
/
/
8.10.4.3. TSC Port Control Register(Default Value: 0x00000000)
Offset: 0x10
Register Name: TSC_PCTLR
Bit
R/W
Default/Hex
Description
31:1
/
/
/
0
R/W
0
TSInPort0Ctrl
TS Input Port0 Control
0 – SPI
1 – SSI
8.10.4.4. TSC Port Parameter Register(Default Value: 0x00000000)
Offset: 0x14
Register Name: TSC_PPARR
Bit
R/W
Default/Hex
Description
31:8
/
/
/
7:0
R/W
0x00
TSInPort0Par
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