Owners manual

Interfaces
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 599
2: By both PSYNC and Sync Byte
3: Reserved
7
R/W
0
SyncBytePos
Sync Byte Position
0: the 1st byte position
1: the 5th byte position
Notes: This bit is only used for 192 bytes packet size.
6:2
/
/
/
1:0
R/W
0
PktSize
Packet Size
Byte Size for one TS packet
0: 188 bytes
1: 192 bytes
2: 204 bytes
3: Reserved
8.10.4.16. TSF Interrupt Enable and Status Register(Default Value: 0x00000000)
Offset: TSF+0x08
Register Name: TSF_IESR
Bit
R/W
Default/Hex
Description
31:20
/
/
/
19
R/W
0
TSFFOIE
TS PID Filter (TSF) Internal FIFO Overrun Interrupt Enable
0: Disable
1: Enable
18
R/W
0
TSFPPDIE
TS PCR Packet Detect Interrupt Enable
0: Disable
1: Enable
17
R/W
0
TSFCOIE
TS PID Filter (TSF) Channel Overlap Interrupt Global Enable
0: Disable
1: Enable
16
R/W
0
TSFCDIE
TS PID Filter (TSF) Channel DMA Interrupt Global Enable
0: Disable
1: Enable
15:4
/
/
/
3
R/W
0
TSFFOIS
TS PID Filter (TSF) Internal FIFO Overrun Status
Write ‘1’ to clear.
2
R/W
0
TSFPPDIS
TS PCR Packet Found Status
When it is ‘1’, one TS PCR Packet is found. Write ‘1’ to clear.
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