Owners manual
Overview
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 63
2.1.9.4. CIR
A flexible receiver for IR remote
Programmable FIFO threshold
2.1.9.5. UART
Up to five UART controllers
64-Bytes Transmit and receive data FIFOs for all UART
Compatible with industry-standard 16550 UARTs
Support Infrared Data Association(IrDA) 1.0 SIR
2.1.9.6. SPI
• Up to two SPI controllers
• Full-duplex synchronous serial interface
• Master/Slave configurable
• Mode0~3 are supported for both transmit and receive operations
• Two 64-Bytes FIFO for SPI-TX and SPI-RX operation
• DMA-based or interrupt-based operation
• Polarity and phase of the chip select(SPI_SS) and SPI_Clock(SPI_SCLK) are configurable
• Support single and dual read mode
2.1.9.7. TWI
• Up to four TWI(Two Wire Interface) controllers
• Support Standard mode(up to 100K bps) and Fast mode(up to 400K bps)
• Master/Slave configurable
• Allows 10-bit addressing transactions
2.1.9.8. TS
Compliant with the industry-standard AMBA Host Bus(AHB) Specification, Revision 2.0.Support 32-bit Little Endian
bus.
Support DVB-CSA V1.1 Descrambler
One external Synchronous Parallel Interface(SPI) or one external Synchronous Serial Interface(SSI)
Configurable SPI and SSI timing parameters
Hardware packet synchronous byte error detecting
Hardware PCR packet detecting
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