Owners manual

Pin Description
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 80
Pin/Signal Name
Description
Type
EPHY
EPHY_RXP
Transceiver Positive Output/Input
A I/O
EPHY_RXN
Transceiver Negative Output/Input
A I/O
EPHY_TXP
Transceiver Positive Output/Input
A I/O
EPHY_TXN
Transceiver Negative Output/Input
A I/O
EPHY_RTX
EPHY External Resistance to Ground
AI
EPHY_LINK_LED
EPHY LINK Up/Down Indicator LED
O
EPHY_SPD_LED
EPHY 10M/100M Indicator LED
O
EPHY_VDD
Analog Power Supply for EPHY
P
EPHY_VCC
Analog Power Supply for EPHY
P
SD/MMC
SDC0_CMD
Command Signal for SD/TF Card
I/O
SDC0_CLK
Clock for SD/TF Card
O
SDC0_D[3:0]
Data Input and Output for SD/TF Card
I/O
SDC1_CMD
Command Signal for SDIO WIFI
I/O
SDC1_CLK
Clock for SDIO WIFI
O
SDC1_D[3:0]
Data Input and Output for SDIO WIFI
I/O
SDC2_CMD
Command Signal for SD/eMMC
I/O
SDC2_CLK
Clock for SD/eMMC
O
SDC2_D[7:0]
Data Input and Output for SD/eMMC
I/O
SDC2_RST
Reset Signal for SD/eMMC
O
NAND FLASH
NAND_DQ[7:0]
NAND Flash0 Data Bit [7:0]
I/O
NAND_DQS
NADN Flash Data Strobe
I/O
NAND_WE
NAND Flash Write Enable
O
NAND_RE
NAND Flash chip Read Enable
O
NAND_ALE
NAND Flash Address Latch Enable
O
NAND_CLE
NAND Command Latch Enable
O
NAND_CE[1:0]
NAND Flash Chip Select [1:0]
O
NAND_RB[1:0]
NAND Flash Ready/Busy Bit
I
Interrupt
PA_EINT[21:0]
GPIO A Interrupt
I
PG_EINT[13:0]
GPIO G Interrupt
I
S_PL_EINT[11:0]
GPIO L Interrupt
I
PWM
S_PWM
Pulse Width Modulation output
O
PWM0
Pulse Width Modulation output
O
IR
S_CIR_RX
IR Data Receive
I
CSI
CSI_PCLK
CSI Pixel Clock
I
CSI_MCLK
CSI Master Clock
O
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