Owners manual

Pin Description
H3 Datasheet(Revision1.2) Copyright© 2015 Allwinner Technology Co.,Ltd.All Rights Reserved. Page 81
Pin/Signal Name
Description
Type
CSI_HSYNC
CSI Horizontal SYNC
I
CSI_VSYNC
CSI Vertical SYNC
I
CSI_D[7:0]
CSI Data bit [7:0]
I
CSI_SCK
CSI Command Serial Clock Signal
I/O
CSI_SDA
CSI Command Serial Data Signal
I/O
EMAC
RGMII_RXD3/MII_RXD3
/RMII_NULL
RGMII/MII Receive Data
I
RGMII_RXD2/MII_RXD2/
RMII_NULL
RGMII/MII Receive Data
I
RGMII_RXD1/MII_RXD1/
RMII_RXD1
RGMII/MII /RMII Receive Data
I
RGMII_RXD0/MII_RXD0/
RMII_RXD0
RGMII/MII /RMII Receive Data
I
RGMII_RXCK/MII_RXCK/
RMII_NULL
RGMII/MII Receive Clock
I
RGMII_RXCTL/MII_RXDV/
RMII_CRS_DV
RGMII Receive Control/MII Receive Enable/RMII Carrier Sense-Receive
Data Valid
I
RGMII_NULL/MII_RXERR/
RMII_RXER
MII/RMII Receive Error
I
RGMII_TXD3/MII_TXD3/
RMII_NULL
RGMII/MII Transmit Data
O
RGMII_TXD2/MII_TXD2/
RMII_NULL
RGMII/MII Transmit Data
O
RGMII_TXD1/MII_TXD1/
RMII_TXD1
RGMII/MII /RMII Transmit Data
O
RGMII_TXD0/MII_TXD0/
RMII_TXD0
RGMII/MII /RMII Transmit Data
O
RGMII_NULL/MII_CRS/
RMII_NULL
MII Carrier Sense
I
RGMII_TXCK/MII_TXCK/
RMII_TXCK
RGMII/MII /RMII Transmit Clock: Output Pin for RGMII, Input Pin for
MII/RMII
I/O
RGMII_TXCTL/MII_TXEN/
RMII_TXEN
RGMII Transmit Control/MII Transmit Enable/RMII Transmit Enable:
Output Pin for RGMII/RMII, Input Pin for MII
I/O
RGMII_NULL/MII_TXERR/
RMII_NULL
MII Transmit Error
O
RGMII_CLKIN/MII_COL/
RMII_NULL
RGMII Transmit Clock from External/MII Collision Detect
I
MDC
RGMII/MII /RMII Management Data Clock
O
MDIO
RGMII/MII /RMII Management Data Input/Output
I/O
TRANSPORT STREAM
TS_CLK
Transport Stream Clock
I
TS_ERR
Transport Stream Error Indicate
I
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