User's Manual

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Theory of Operation
The HumPRO
TM
Series transceiver is a low-cost, high-performance
synthesized FSK / GFSK / MSK transceiver. Figure 19 shows the module’s
block diagram.
The HumPRO
TM
Series transceiver operates in the 902 to 928MHz
frequency band. The transmitter output power is programmable. The
range varies depending on the antenna implementation and the local RF
environment.
The RF carrier is generated directly by a frequency synthesizer that includes
an on-chip VCO. The received RF signal is amplified by a low noise
amplifier (LNA) and down-converted to I/Q quadrature signals. The I/Q
signals are digitized by ADCs.
An additional front-end power amplifier boosts the transmitter power to
0.5W (~27dBm). An additional LNA improves the receiver sensitivity by
around 6dB.
A low-power onboard communications processor performs the radio
control and management functions including Automatic Gain Control
(AGC), filtering, demodulation and packet synchronization. A control
processor performs the higher level functions and controls the serial and
hardware interfaces.
A crystal oscillator generates the reference frequency for the synthesizer
and clocks for the ADCs and the processor.
PA
LNA
0
90
FREQ
SYNTH
ADC
ADC
DEMODULATOR
MODULATOR
ANTENNA
PROCESSOR
GPIO /
INTERFACE
INTERFACE
PA
LNA
Figure 19: HumPRO-A
TM
Series Transceiver RF Section Block Diagram
Module Description
The HumPRO
TM
Series module is a completely integrated RF transceiver
and processor designed to transmit digital data across a wireless link.
It employs a fast-locking FHSS system for noise immunity and higher
transmitter output power as allowed by government regulations.
When the module does not have data to send it scans all of the channels
for incoming data. If it finds a valid preamble, it pauses and looks for
the start of a packet. When it receives a valid packet with a matching
destination address the module outputs the data through the UART.
The transmitting module accepts data bytes through its UART until a
configurable number of bytes is reached or a configurable timeout expires
between bytes on the UART. At this point the module transmits the packet.
When the module has data to send it goes to the next channel in its
hopping pattern. It measures the RSSI on that channel to ensure that the
channel is clear. If the RSSI check passes, then it transmits the packets. If
the RSSI fails, then it implements a random wait time and tries again. When
the channel is clear, the module transmits the data.
The module can stay on one channel for up to 400ms. If the module is
ready to start transmitting near the end of the channel time, it transmits the
number of bytes that it can in the remaining time. It then hops to the next
channel in its hopping pattern to transmit the remaining data.
The module supports automatic acknowledgements for assured delivery.
When enabled, the receiving module responds to a valid transmission with
an acknowledgement to let the transmitting module know that it received
the data. If an acknowledgement is not received then the transmitting
module repeats the transmission for a configurable number of retries. If the
retry limit is exceeded without an acknowledgement then the transmitting
module issues an exception error to let the host micro know of the
communication problem.
A standard UART interface is used to configure the module for operation
and for the data input and output. This is suitable for direct connection to
UARTs on many microcontrollers, USB converters and RS-232 converters.
A simple command set is used for configuration and control.
Modules can be pre-configured for fixed point-to-point or broadcast
topologies allowing streaming data (no commands) during operation.