User`s guide

PCIe to 3.0-Gb/s SAS Host Bus Adapters User’s Guide 1-1
Copyright © 2006-2007 by LSI Corporation. All rights reserved.
LSI Confidential
Chapter 1
Introduction
This chapter describes the LSI PCI Express to 3.0-Gb/s SAS host bus
adapters and consists of the following sections:
• Section 1.1, “Overview”
• Section 1.2, “Features”
• Section 1.3, “PCI Performance”
• Section 1.4, “Software”
1.1 Overview
The LSI PCIe to SAS host bus adapters (HBAs) provide four or eight
serial ports for connection to SAS/SATA (Serial ATA) devices. Each port
is capable of a SAS link rate and a SATA link rate of 3.0-Gb/s. The PCI
Express transmission and reception data rate is 2.5-Gb/s in each
direction, yielding a total bandwidth of 5.0-Gb/s for each full-duplex lane.
The LSI PCIe to SAS HBAs are implemented using four or eight PCI
Express PHYs, which provide possible host-side maximum transmission
and reception rates of up to 4.0-GB/s.
The LSI PCIe to SAS HBAs contain Flash ROM for storing the BIOS and
firmware, and NVSRAM for storing nonvolatile RAID information. The
SAS3442E, SAS3442EL, SAS3444E, SAS3444EL, SAS3800E,
SAS3801E, SAS3801EL and SAS31601E HBAs provide a 128K x 36-b
PBSRAM memory device for storing SAS Address Port information
allowing for connection to more than 128 devices. The LEDs on the
HBAs report a heartbeat, activity, and fault conditions when detected by
firmware. Fusion-MPT™ firmware operates the HBA.
The PCI Express interface is compliant with the PCI Express
Specification, revision 1.0a. All PCI software is backwards compliant with