Applicability type No. Product model Description 1 SS808-NA 16+2 eMCP,4G version Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
Copyright Copyright ©2019 Fibocom Wireless Inc. All rights reserved. Without the prior written permission of the copyright holder, any company or individual is prohibited to excerpt, copy any part of or the entire document, or transmit the document in any form. Notice The document is subject to update from time to time owing to the product version upgrade or other reasons. Unless otherwise specified, the document only serves as the user guide.
Contents Figure Index ............................................................................................................................................... 7 Table Index ................................................................................................................................................. 9 1 2 3 Introduction ......................................................................................................................................... 13 1.1 Instruction ....
3.13 TP ......................................................................................................................................... 43 3.14 Camera ................................................................................................................................. 44 Rear camera.................................................................................................................. 45 3.14.2 Front camera ................................................................
9 8.1 Recommended Parameters ................................................................................................. 64 8.2 Power Consumption ............................................................................................................. 64 8.3 RF Transmit Power ............................................................................................................... 65 8.4 RF Receiver Sensitivity ..........................................................................
Figure Index Figure 1 Pin Assignment ..................................................................................................................... 17 Figure 2 VBAT Voltage Drop ............................................................................................................... 28 Figure 3 Power Supply Reference Design ......................................................................................... 29 Figure 4 VRTC Reference Design .................................................
Figure 33 Structural Dimension .......................................................................................................... 68 Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
Table Index Table 1 Support Bands........................................................................................................................ 14 Table 2 Main Performance .................................................................................................................. 14 Table 3 I/O Description Parameters .................................................................................................... 17 Table 4 Power Supply ....................................................
Table 34 Recommended Parameters ................................................................................................. 64 Table 35 Power Consumption ............................................................................................................. 64 Table 36 RF Transmit Power .............................................................................................................. 65 Table 37 RF Receiver Sensitivity .................................................................
Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1)This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules.
Radiation Exposure Statement This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20cm between the radiator & your body. This device is intended only for OEM integrators under the following conditions: 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and the maximum antenna gain allowed for use with this device is 3 dBi.
1 Introduction 1.1 Instruction This document describes the electrical characteristics, RF performance, structure size, application environment, etc. of SS808 series module. With the assistance of the document and other instructions, the developers can quickly understand the hardware functions of the SS808 series module and develop products. 1.2 Reference Standards ⚫ 3GPP TS 51.010-1 V10.5.0: Mobile Station (MS) conformance specification; Part 1: Conformance specification ⚫ 3GPP TS 34.121-1 V10.8.
2 Product Overview 2.1 Product Specification SS808 series smart module integrates core components such as Baseband, eMCP, PMU, Transceiver, PA; it supports long distance multi-mode communication such as FDD/TDD-LTE,WCDMA and WIFI/BT shortdistance radio transmission technology, as well as GNSS wireless positioning technology. SS808 series module is embedded with Android operating system and support various interfaces such as MIPI/USB/UART/SPI/I2C.
Performance Description Support 3GPP R8 DC-HSPA+ WCDMA features Support 16-QAM, 64-QAM and QPSK modulation 3GPP R6 CAT6 HSUPA: Maximum uplink rate 5.76Mbps 3GPP R8 CAT24 DC-HSPA+: Maximum downlink rate 42Mbps Support FDD/TDD CAT4 LTE features Support 1.4-20M RF bandwidth Downlink support multi-user MIMO Maximum uplink rate 50Mbps, maximum downlink rate 150Mbps Support 2.4G and 5G WLAN wireless communication, support WLAN features 802.11a, 802.11b, 802.11g, 802.11n and 802.
Performance Description Two (U)SIM card interfaces supporting (U)SIM card: 1.8/3V adaptive (U)SIM interface Support dual (U)SIM dual standby (default dual) Support hot plug (close by default),support hot plug (close by default) Three UART serial interfaces, with the maximum rate up to 4Mbps One 4-line serial interface supporting RTS and CTS hardware flow UART interface control One 2-line serial interface One 2-line debug serial interface SDIO interface I2C interface Support SD3.
112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 SPKR_DRV_P SPKR_DRV_M GND MIC1_P MIC1_N GND MIC2_P GND_MIC CDC_HS_DET CDC_HPH_L CDC_HPH_REF CDC_HPH_R GND CDC_EAR_M CDC_EAR_P GND ANT_DRX GND VREG_L17_2P85 VREG_L5_1P8 ADC NC VRTC NC NC KEY_PWR_N VREG_L6_1P8 GND ANT_GPS GND GPIO_19 GPIO_59 SPI6_MOSI SPI6_MISO SPI6_CS SPI6_CLK GPIO_63 146 147 148 229 1 GND GND GND 110 3 109 4 164
Symbol Description AO Analog Output OD Open Drain Descriptions of SS808 module pins are presented in the following table: Pin Name Pin # I/O Pin Description Note Power Voltage range: 3.5~ VBAT 4,5,6 PI Main power input 4.2V, recommend 3.8V Voltage range: VRTC 126 PI/PO RTC clock power supply 2.0~3.25V, recommend 3.0V VREG_L2_1P1 226 PO 1.1V voltage output Drive current TBD VREG_L5_1P8 129 PO 1.8V voltage output Drive current TBD VREG_L6_1P8 122 PO 1.
Pin Name Pin # I/O Pin Description PM8953_GPIO_8 168 DO PMIC GPIO SPMI_DATA 167 I/O SPMI data signal SPMI_CLK 169 DO SPMI clock signal PM_PON_RESET_N 166 DO Power_on reset signal KEY_PWR_N 123 DI Power key KEY_VOL_UP_N 91 DI Volume + Note Key Active low, don’t add pull-up circuit Active low Volume- key by default, active low.
Pin Name Pin # I/O Pin Description Note SDC2_DATA3 34 I/O SD card data interface SDC2_DATA2 33 I/O SD card data interface SDC2_DATA1 32 I/O SD card data interface SDC2_DATA0 31 I/O SD card data interface SDC2_CLK 29 DO SD card clock SDC2_CMD 30 I/O SD card command interface SD_CARD_DET_N 35 DI SD card detection VREG_L11_SDC_PWR 28 PO I2C8_SCL 87 OD I2C clock For sensor default I2C8_SDA 88 OD I2C data For sensor default TS_I2C_SCL 41 OD I2C clock TS_I2C_SDA
Pin Name Pin # I/O Pin Description Note USB_ DM 11 I/O USB 2.
Pin Name Pin # I/O Pin Description SPI6_CLK 113 DO SPI clock SPI6_CS 114 DO SPI chip select SPI6_MISO 115 DI SPI6_MOSI 116 DO MIPI_DSI0_CLK_P 53 AO Main LCD MIPI clock + MIPI_DSI0_CLK_N 52 AO Main LCD MIPI clock - MIPI_DSI0_LANE0_P 55 AI/AO Main LCD MIPI Lane 0+ MIPI_DSI0_LANE0_N 54 AI/AO Main LCD MIPI Lane 0- MIPI_DSI0_LANE1_P 57 AI/AO Main LCD MIPI Lane 1+ MIPI_DSI0_LANE1_N 56 AI/AO Main LCD MIPI Lane 1- MIPI_DSI0_LANE2_P 59 AI/AO Main LCD MIPI Lane 2+ MIPI_DS
Pin Name Pin # I/O Pin Description MIPI_DSI1_LANE2_P 200 AI/AO Sub-LCD MIPI Lane 2+ MIPI_DSI1_LANE2_N 201 AI/AO Sub-LCD MIPI Lane 2- MIPI_DSI1_LANE3_P 202 AI/AO Sub-LCD MIPI Lane 3+ MIPI_DSI1_LANE3_N 203 AI/AO Sub-LCD MIPI Lane 3- LCD1_RST_N 216 DO Sub-LCD reset signal PWM 44 DO LCD backlight PWM control LCD1_BL_EN 211 DO LCD_TE 50 DI LCD synchronization signal TS0_INT_N 42 DI Main LCD TP interrupt TS0_RST_N 43 DO Main LCD TP reset TS1_INT 212 DI Sub-LCD TP inte
Pin Name Pin # I/O Pin Description MIPI_CSI2_LANE3_P 180 AI/AO Rear camera MIPI Lane3 + MIPI_CSI2_LANE3_N 179 AI/AO Rear camera MIPI Lane3 - CAM0_MCLK 75 DO Rear camera master clock CAM0_RST_N 80 DO Rear camera reset CAM0_PWD_N 81 DO Rear camera power down MIPI_CSI0_CLK_P 71 AO Front camera MIPI clock + MIPI_CSI0_CLK_N 70 AO Front camera MIPI clock - MIPI_CSI0_LANE0_P 73 AI/AO Front camera MIPI Lane0 + MIPI_CSI0_LANE0_N 72 AI/AO Front camera MIPI Lane0 - MIPI_CSI0_LAN
Pin Name Pin # I/O Pin Description AFVDD_2.
Pin Name Pin # I/O ALSP_INT_N 106 DI MAG_INT_N 107 DI ACCL_INT2_N 108 DI ACCL_INT1_N 109 DI 128 AI Pin Description Ambient light Note sensor interrupt Magnetic sensor interrupt Accelerometer sensor interrupt Accelerometer sensor interrupt ADC interface ADC ADC detect Can configure to 0.
Pin Name Pin # I/O Pin Description Note GPIO_96 111 I/O B-PD:nppukp GPIO_97 100 I/O B-PD:nppukp B-PD:nppukp, must GPIO_105 103 not pull up before I/O power on the module B-PD:nppukp,must GPIO_106 102 not pull up before I/O power on the module Tuner control must GPIO_113 220 not pull up before I/O power on the module Tuner control, must GPIO_114 221 not pull up before I/O power on the module GPIO_135 39 I/O Tuner control GPIO_137 99 I/O Tuner control GPIO_138 86
备注: 标有 “Boot configuration”的管脚不允许硬件上拉。 3 Application Interface 3.1 Power supply The SS808 provides three VBAT pins for connecting to external power supply source. The input range of power is 3.5V~4.2V and the recommended value is 3.8V. The performance of the power supply such as its load capacity, ripple etc. will directly affect the operating performance and stability of the module.
VBAT Module + 220uF 220uF 1uF 100nF 39pF 33pF 18pF 8.2pF 6.
Module VRTC + Coin cell Figure 4 VRTC Reference Design 3.1.3 Power Output The SS808 module provide multiple power outputs for peripheral circuits. It is recommended to connect 33pF and 10pF capacitors in parallel with every power to avoid high frequency interference effectively. Table 7 Power Output Pin Name Programmable Range (V) Default Voltage (V) Drive Current (mA) VREG_L2_1P1 0.375~1.5375 1.1 TBD VREG_L5_1P8 - 1.8 TBD VREG_L6_1P8 - 1.8 TBD VREG_L10_2P8 1.75~3.3375 2.
KEY_PWR_N 3.2.1.1 123 Active low, can be used to power on/off, restart, DI sleep/wakeup the module Power on After module’s VBAT pin is powered, pull down KEY_PWR_N pin for more than 2 seconds can trigger module power on.
3.2.1.2 Power off Normal power off: when module in operating mode, pull down KEY_PWR_N 500mS and then release it, user interface will display selection box (select power off or restart). Force power off: pull down KEY_PWR_N pin more than 10S module will be forced power off.
PMI Module PS_HOLD PM_PON_RESET_N SPMI_CLK SPMI_CLK SPMI_DATA SPMI_DATA PON_1 SYS_OK Figure 9 External SPMI Diagram Design notice: 1) SPMI_CLK, SPMI_DATA, and PMI_RESIN_N are susceptible to glitches, please ensure these signals routed away from EMI aggressors like RF antenna and switchers (SMPS). 2) SPMI_CLK and SPMI_DATA are high speed signal and need three dimensional ground. 3.4 USB The SS808 series module supports one USB 2.0 and one USB3.0 interface; USB2.
Pin Name Pin # I/O Description Note USB_SS_SWITCH_SEL 217 DO USB Type-C data switch control USB_CC2 223 AI/AO USB_CC1 227 AI/AO USB_HS_ID 16 DI USB Type-C connector configuration pin USB OTG detection The reference design of USB2.0 is show as follow figure: Connector Module VBUS USB_DM DM USB_DP DP USB_ID ID 1uF 10uF USB_VBUS GND Figure 10 USB2.
Module OUT USB_VBUS_IN USB_VCONN IN OVP Type C Connector EN VBUS USB_HS_ID D- USB_DM USB_DP D+ USB_CC1 CC1 CC2 USB_CC2 USB_SS_TX_P A0+ USB_SS_TX_M A0- USB_SS_RX_P A1+ USB_SS_RX_M A1- B1+ SWITCH SEL USB_SS_SWITCH_SEL VCC B1- SSTXP2 SSTXN2 SSRXP2 SSRXN2 C0+ C0C1+ C1- 100nF VDD_3.3V SSTXP1 SSTXN1 SSRXP1 SSRXN1 B0+ B0- ESD Figure 12 USB3.
Pin Name Pin # I/O Description Note UART2_TX 90 DO UART2 data transmit UART2_RX 89 DI UART2 data receive UART4_TX 45 DO UART4 data transmit UART4_RX 46 DI UART4 data receive UART4_CTS 47 DI UART4 clear to send UART4_RTS 48 DO UART4 request to send UART5_TX 209 DO UART5 data transmit UART5_RX 207 DI UART5 data receive Debug serial port All series ports are 1.8V voltage domain, if the peripheral is other voltage domain, please add level shift.
not supported Note: SPI6 don’t support DMA mode. 3.7 (U)SIM The SS808 supports two (U)SIM cards, dual-SIM dual-standby single-active (default dual) and both support hot plug (default off).
Module 100K VREG_L5_1P8 Connector 22R UIM_VDD VCC 10K 22R UIM_DATA DATA 22R UIM_DETECT DET 22R UIM_CLK CLK 22R RST 2.2uF UIM_RST 18pF ESD Figure 14 (U)SIM Reference Design (U)SIM card design notice: 1) The length from the (U)SIM card holder to module should less than 100mm. 2) The layout and routing of the (U)SIM card must be kept away from EMI interference sources such as RF antenna and digital switch power.
VREG_L11_SDC_PWR VREG_L5_1P8 100MHz_120R VREG_L11_SDC_PWR 100nF 4.7uF 100K 10K NC NC NC NC Module Connector VDD 22R SDC2_DATA3 SDC2_DATA2 SDC2_DATA1 SDC2_DATA0 SDC2_CLK SDC2_CMD SDC_INS_DET DAT3 22R DAT2 22R DAT1 22R DAT0 22R CLK 22R CMD 1K DETECTIVE NC NC NC NC NC NC Figure 15 SDIO Reference Design SDIO design notice: 1) VREG_L11_SDC_PWR is the SD card peripheral driving power and can provide about 800mA current. Pay attention to controlling the width of trace.
Pin Name Pin # I/O Description GPIO_63 112 B-PD:nppukp YES GPIO_91 97 B-PD:nppukp YES GPIO_96 111 B-PD:nppukp NO GPIO_97 100 B-PD:nppukp YES GPIO_105 103 B-PD:nppukp NO GPIO_106 102 B-PD:nppukp NO GPIO_113 220 B-PD:nppukp NO GPIO_114 221 B-PD:nppukp NO GPIO_135 39 B-PD:nppukp NO GPIO_137 99 B-PD:nppukp YES GPIO_138 86 B-PD:nppukp NO GPIO_140 98 B-PD:nppukp YES Note: B: Bidirectional digital with CMOS input H: High-voltage tolerant NP: pdpukp = default no-p
Pin Name Pin # I/O Description CAM2_I2C_SCL 206 OD Camera I2C clock CAM2_I2C_SDA 208 OD Camera I2C data Note Note: When I2C has more than one peripheral, please ensure the uniqueness of every peripheral address. 3.11 ADC SS808 series module provides one ADC interfaces and its maximum Resolution is 15 bits, its pin definition is shown as follow table: Table 16 ADC Pin Definition Pin Name Pin # I/O Description Note ADC 128 AI ADC detection pin 0.3V~VBAT Configurable 3.
Pin Name Pin # I/O Description Note LCD0_RST_N 49 DO Main LCD reset MIPI_DSI1_CLK_P 192 AO Sub-LCD MIPI clock + MIPI_DSI1_CLK_N 193 AO Sub-LCD MIPI clock - MIPI_DSI1_LANE0_P 194 AI/AO Sub-LCD MIPI Lane0 + MIPI_DSI1_LANE0_N 195 AI/AO Sub-LCD MIPI Lane0 - MIPI_DSI1_LANE1_P 198 AI/AO Sub-LCD MIPI Lane1 + MIPI_DSI1_LANE1_N 199 AI/AO Sub-LCD MIPI Lane1 - MIPI_DSI1_LANE2_P 200 AI/AO Sub-LCD MIPI Lane2 + MIPI_DSI1_LANE2_N 201 AI/AO Sub-LCD MIPI Lane2 - MIPI_DSI1_LANE3_P 20
Figure 16 LCM Reference Design LCM design notice: 1) MIPI is a high-speed signal. It is recommended to connect the common mode inductor in series near the LCD connector to reduce the electromagnetic interference of the circuit.
VREG_L5_1P8 10K 2.2K TP 2.2K Module VREG_L10_2P8 VDD TS_I2C_SCL SCL TS_I2C_SDA SDA RESET TS_RST TS_INT_N INT 2.2uF 100nF Figure 17 TP Reference Design 3.14 Camera The camera interface is based on the MIPI_CSI standard and can support two(4-Lane+4-Lane) or three(4Lane+2-Lane+1-Lane) cameras (three cameras by default), maximum 21MP pixel.
Pin Name Pin # I/O 4-Lane+4-Lane 4-Lane+2-Lane+1-Lane CAM0_RST_N 80 DO Rear camera reset Rear camera reset CAM0_PWD_N 81 DO Rear camera power down Rear camera power down CAM_I2C_SCL 84 OD Camera I2C clock Camera I2C clock CAM_I2C_SDA 85 OD Camera I2C data Camera I2C data MIPI_CSI0_CLK_P 71 AO Front camera MIPI Clock+ Front camera MIPI Clock+ MIPI_CSI0_CLK_N 70 AO Front camera MIPI Clock - Front camera MIPI Clock - MIPI_CSI0_LANE0_P 73 AI/AO Front camera MIPI Lane 0 Fro
VREG_L17_2P85 VREG_L6_1P8 VREG_L22_2P8 VREG_L2_1P1 VREG_L6_1P8 DOVDD 2.2K 2.
VREG_L6_1P8 VREG_L22_2P8 VREG_L2_1P1 VREG_L6_1P8 2.2K 2.
VREG_L6_1P8 VREG_L22_2P8 VREG_L6_1P8 CAM1_CLK AVDD MCLK CAM1_PWD_N PWD CAM1_RST_N RST CAM2_SCL SCL CAM2_SDA SDA MIPI_CSI0_LAN3_P EMI CLK_P MIPI_CSI0_LAN3_N CLK_N MIPI_CSI0_LAN2_P DAT0_P EMI MIPI_CSI0_LAN2_N CAM Connector 100nF 10uF 2.2K 2.2K 1uF DOVDD DAT0_N Figure 21 Depth Camera Reference Design 3.14.4 Design notice MIPI_CSI is a high-speed signal which has relatively high requirement for routing and must be prioritized when PCB layout. 1) MIPI is a high-speed signal.
3.15 Sensor SS808 series module use I2C to communicate with sensors and support various types of sensors, such as accelerometer sensor, ambient light sensor, magnetic sensor and gyroscopes etc.
recommended to connect 8-ohm speakers. Note that the route width must meet the power rating requirements. If an external audio amplifier is required, dual input please choose dual channel and signal input channel can configurable by software. 3) The reference ground of the headphone has already grounded in the module. The external circuit is recommended not to be grounded and resistor can be reserved.
3.16.2 Earpiece Circuit Design 33pF Module 0R 33pF CDC_EAR_P 0R 33pF CDC_EAR_N Figure 23 Earpiece Reference Design 3.16.3 Headphone Circuit Design Module 33pF MIC2_P CDC_HPH_L CDC_HPH_R 20K HPH_DET 0R 33pF 33pF CDC_HPH_REF Figure 24 Headphone Circuit Design Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
3.16.4 Speaker Circuit Design Module SPKR_DRV_P 39pF 39pF SPKR_DRV_N Figure 25 Speaker Circuit Design 3.17 Force Download Interface SS808 series module provides USB_FORCE_BOOT pin as an emergency download interface. Connect the USB_FORCE_BOOT with VREG_L5_1P8 pin when power on, the module can enter the emergency download mode which is used for the final processing mode when the product fails to power on or run normally.
4 Antenna Interface SS808 series module support 2/3/4G main antenna/diversity reception antenna, WIFI/BT antenna and GNSS antenna. 4.1 MAIN/DRX Antenna SS808 series module provides two 2G/3G/4G antenna interfaces. The ANT_MAIN is used to receive and transmit RF signal, the ANT_DRX is used for diversity reception. Table 22 MAIN/DRX Antenna Interface Definition Pin Name Pin # I/O Description Note ANT_TRX 94 I/O 2G/3G/4G antenna interface ANT_DRX 132 AI Diversity reception antenna 4.1.
4.1.2 Circuit Reference Design When use the SS808 series module, it is necessary to connect the antenna pin with the RF connector or antenna feed point on the main board via an RF trace. Microstrip trace is recommended for RF trace, with insertion loss within 0.2dB and impedance at 50ohm.A π-type circuit is reserved between the module and the antenna connector (or feed point) for antenna debugging.
Module WIFI/BT_Antenna 0R ANT_WIFI/BT NC NC Figure 28 WIFI/BT Antenna Reference Design 4.3 GNSS Antenna GNSS supports GPS GLONASS BeiDou Table 26 GNSS Antenna Interface Definition Pin Name Pin # I/O Description ANT_GPS 120 AI GNSS antenna interface Note 4.3.1 Operating Frequency Table 27 GNSS Operating Frequency Mode Frequency Unit GPS 1575.42±1.023 MHz GLONASS 1597.42-1605.8 MHz BeiDou 1561.098±2.046 MHz 4.3.
Module GNSS_Antenna 0R ANT_GNSS NC NC Figure 29-1 GNSS Antenna Reference Design The active antenna reference circuit is shown in the following figure: Figure 29-2 GNSS active antenna connection diagram The power of the active antenna is fed from the antenna's signal line through a 56nH inductor. Common active antennas supply power from 3.3V to 5.0V.The active antenna itself consumes very little power, but requires a stable and clean power supply.
SS808 Module Antenna Requirements Standard Antenna requirements VSWR: ≤ 2 Gain (dBi): 3 Max input power (W): 50 Input impedance (Ω): 50 WCDMA/LTE Polarization type: vertical direction Insertion loss: < 1dB (0.7-1GHZ) Insertion loss: < 1.5dB(1.4-2.2GHZ) Insertion loss: < 2dB(2.3-2.
5 Antenna PCB Layout Design Guide For user PCB, the characteristic impedance of all RF signal traces should be within 50Ω. In general, the impedance of the RF signal trace is determined by the dielectric constant of the material, the trace width (W), the ground clearance (S) and the height of the reference ground plane (H). The control of the characteristic impedance of the PCB usually in two ways: microstrip trace and coplanar waveguide.
Figure 32 Four-layer PCB Coplanar Waveguide Structure (Reference Ground layer4) In the design of RF antenna interface circuit, in order to ensure good performance and reliability of the RF signal, it is recommended to observe the following principles: ➢ The impedance simulation tool should be used to accurately control the RF signal cable at 50Ω impedance. ➢ The GND pin adjacent to the RF pin should not have thermal welding plate and should be in full contact with the ground.
6 WIFI and Bluetooth 6.1 WIFI Overview SS808 series module supports 2.4G and 5G WLAN wireless communications and 802.11a, 802.11b, 802.11g, 802.11n, 802.11ac standards, with a maximum speed up to 433Mbps. Its characteristics are as follows: ➢ Support Wake-on-WLAN (WoWLAN) ➢ Support ad hoc mode ➢ Support WAPI ➢ Support AP mode ➢ Support Wi-Fi Direct ➢ Support MCS 0-7 for HT20 and HT40 ➢ Support MCS 0-8 for VHT20 ➢ Support MCS 0-9 for VHT40 and VHT80 6.
Frequency Mode 802.11ac Bandwidth Date Rate (Mhz) Mask Margin(dB) MCS7 40M 14.0±2 MCS0 20M 18.0±2 MCS8 20M 16.0±2 MCS0 40M 180±2 MCS9 40M 14.0±2 MCS0 80M 18.0±2 MCS9 80M 12.0±2 Table 30 WIFI RX Sensitivity Frequency Mode 802.11b 2.4G 802.11g 802.11n 802.11a 802.11n 802.11n 5G 802.11ac Date Bandwidth Sensitivity Rate (Mhz) (dBm) 1Mbps 20 -92.0 11Mbps 20 -88.0 6Mbps 20 -89.0 54Mbps 20 -72.0 MCS0 20 -85.0 MCS7 20 -70.0 6Mbps 20M -89.
IEEE 802.11n WLAN MAC and PHY, October 2009 + IEEE 802.11-2007 WLAN MAC and PHY,June 2007 IEEE Std 802.11b, IEEE Std 802.11d, IEEE Std 802.11e, IEEE Std 802.11g, IEEE Std 802.11i: IEEE 802.11-2007 WLAN MAC and PHY, June 2007 6.3 Bluetooth Overview SS808 series module supports BT4.2 (BR/EDR+BLE) standards. The modulation method supports GFSK, 8-DPSK and π/4-DQPSK.BR/EDR. Channel bandwidth is 1MHz and can accommodate 79 channels. The BLE channel bandwidth is 2MHz and can accommodate 40 channels.
7 GNSS 7.1 Overview SS808 series smart module supports multiple positioning systems including GPS, GLONASS and Beidou. The module is embedded with LNA which can effectively improve the sensitivity of GNSS. 7.2 GNSS performance Table 33 GNSS Positioning Performance Parameter Sensitivity C/No TTFF CEP Description Result Unit Acquisition -145 dBm Tracking -157 dBm -130dBm 39 dB-Hz Cold Start 44 S Warm Start 40 S Hot Start 2.
8 Electrical, Reliability and RF Performance 8.1 Recommended Parameters Table 34 Recommended Parameters Parameter Min Normal Max Unit VBAT 3.5 3.8 4.2 V USB_VBUS 4.75 5 5.25 V VRTC 2.0 3.0 3.25 V Operating Temperature -30 25 75 ℃ Storage Temperature -40 25 85 ℃ 8.2 Power Consumption Table 35 Power Consumption Parameter Description Condition Result Unit Ioff Power Off Power Off 50 uA WCDMA DRX=8 3.83 TDD LTE DPC (Default Paging Cycle) =#256 3.
Parameter 8.
8.4 RF Receiver Sensitivity The sensitivity of each frequency band of the SS808 series module is shown in the following table: Table 37 RF Receiver Sensitivity Mode LTE (10M) LTE (10M) Band FDD TDD 3GPP Requirement Primary Diversity PRX+Div Unit Band II -111.2 -111.1 -114.2 -104.7 dBm Band IV -109.6 -110.2 -113.1 -106.7 dBm Band V -111.1 -111.4 -114.4 -104.7 dBm Band 2 -99.8 -100 -102.7 -94.3 dBm Band 4 -97.8 -99 -101.5 -96.3 dBm Band 5 -99.1 -100 -102 -94.
Other interface ±0.5 ±1 kV Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
9 Structural Specification 9.1 Structural Dimension The structural dimension of SS808 series module is shown in the follow figure: Figure 33 Structural Dimension 9.2 PCB Soldering Pad and Stencil Design PCB soldering pad and stencil design please refer to《FIBOCOM SS808 SMT Design Description》. 10 Production and Storage 10.1 SMT SMT production process parameters and related requirements please refer to《FIBOCOM SS808 SMT Design Description》. 10.
11 Terms and acronyms Table 39 Terms and Acronyms Term Definition AMR Adaptive Multi-rate bps Bits Per Second CS Coding Scheme DRX Discontinuous Reception FDD Frequency Division Duplexing GMSK Gaussian Minimum Shift Keying HSDPA High Speed Down Link Packet Access IMEI International Mobile Equipment Identity Imax Maximum Load Current LED Light Emitting Diode LSB Least Significant Bit LTE Long Term Evolution CA Carrier Aggregation DLCA Downlink Carrier Aggregation SCell Seconda
RTC Real Time Clock Rx Receive SMS Short Message Service TDMA Time Division Multiple Access TE Terminal Equipment TX Transmitting Direction TDD Time Division Duplexing UART Universal Asynchronous Receiver & Transmitter UMTS Universal Mobile Telecommunications System URC Unsolicited Result Code (U)SIM (Universal) Subscriber Identity Module USSD Unstructured Supplementary Service Data Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value VIHmax Maximum
12 WARING changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
This device is intended only for OEM integrators under the following conditions: 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and the Max allowed antenna gain is as following table showed: ≤3dBi 2) The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required.