User's Manual

DEFINITY ECS Release 8.2 Maintenance for R8.2csi 555-233-119 Issue 1
April 2000
Maintenance Objects
3-1007SYNC (Synchronization)
3
5. Execute the
disable synchronization-switch
and the
enable
synchronization-switch
commands. These two commands (when
executed together) switch the system synchronization reference to
the primary DS1 interface circuit pack. Check the Error Log and
execute the
status synchronization
command to verify that the
primary DS1 interface circuit pack is still the system
synchronization reference. If the primary DS1 interface circuit pack
is not the system synchronization reference, continue with the
following step.
b. This error indicates that Synchronization Maintenance has been disabled
via the
disable synchronization-switch
command. Execute the
enable
synchronization-switch
command to enable Synchronization
Maintenance reference switching and to resolve this alarm.
c. This error indicates a problem with the secondary DS1 reference. It is
cleared when the secondary reference is restored. Refer to note (a) to
resolve this error substituting
secondary
for
primary
in the preceding
resolution steps.
d. This error indicates that the Tone-Clock circuit pack is providing the timing
source for the system. The primary and secondary (if administered) are
not providing a valid timing signal. Investigate errors 1 and 257 to resolve
this error.
e. This error indicates excessive switching of system synchronization
references has occurred. When this error occurs, synchronization is
disabled and the Tone-Clock circuit pack (in the master port network)
becomes the synchronization reference for the system. Execute the
following steps to resolve this error:
1. Check for timing loops and resolve any loops that exist.
2. Test the active Tone-Clock circuit pack in the master port network
via the
test tone/clock PC long
command. Check the Error Log for
TDM-CLK errors and verify that TDM Bus Clock Test #148 passes
successfully. If Test #148 fails with an Error Code 2 through 32, refer
to the TDM-CLK (TDM Bus Clock) Maintenance documentation to
resolve the problem. If not, continue with the following steps.
3. Replace the primary and secondary (if administered) DS1 Interface
circuit packs.
4. Check for an error logged against the primary or secondary DS1
board. If there is an error, follow the DS1 section to resolve the
errors. If there is not, enter
enable sync
, and wait for two to five
minutes for the primary sync source to come on-line.
f. This error indicates that the slave Tone-Clock circuit pack is experiencing
loss of signal. Refer to note (i) for error resolution steps.
g. The following steps should be executed to resolve error 2049 and 2305:
1. Check for timing loops, and resolve any loops that exist.