Datasheet

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INTEGRATED GIGABIT ETHERNET CONTROLLER (NIC)

DATASHEET

Rev. 1.4

24 September 2003

Track ID: JATR-1076-21

RTL8169S-32/RTL8169S-64

Summary of content (52 pages)

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RTL8169S-32/RTL8169S-64 INTEGRATED GIGABIT ETHERNET CONTROLLER (NIC) DATASHEET Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet COPYRIGHT ©2003 Realtek Semiconductor Corp. All rights reserved. No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any means without the written permission of Realtek Semiconductor Corp. TRADEMARKS Realtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this document are trademarks/registered trademarks of their respective owners.
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RTL8169S-32/RTL8169S-64 Datasheet Table of Contents 1. GENERAL DESCRIPTION ............................................................................................................................................... 1 2. FEATURES .......................................................................................................................................................................... 2 3. SYSTEM APPLICATIONS .............................................................................
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RTL8169S-32/RTL8169S-64 Datasheet 6.5. 7. 6.5.1. Link Monitor ........................................................................................................................................................ 14 6.5.2. RX LED................................................................................................................................................................ 14 6.5.3. TX LED ................................................................................................
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RTL8169S-32/RTL8169S-64 Datasheet List of Tables TABLE 1. POWER MANAGEMENT/ISOLATION ............................................................................................................................. 5 TABLE 2. PCI INTERFACE ........................................................................................................................................................... 6 TABLE 3. EEPROM.................................................................................................
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RTL8169S-32/RTL8169S-64 Datasheet List of Figures FIGURE 1. 128-PIN QFP PIN ASSIGNMENTS ............................................................................................................................... 3 FIGURE 2. 233-PIN TFBGA PIN ASSIGNMENTS .......................................................................................................................... 4 FIGURE 3. RX LED ..........................................................................................................
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RTL8169S-32/RTL8169S-64 Datasheet 1. General Description The Realtek RTL8169S-32 and RTL8169S-64 combine a triple-speed IEEE 802.3 compliant media access controller (MAC) with a triple-speed Ethernet transceiver, 32(64*)-bit PCI bus controller, and embedded memory. With state-of-the-art DSP technology and mixed-mode signal technology, they offer high-speed transmission over CAT 5 UTP cable or CAT 3 UTP (10Mbps only) cable.
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RTL8169S-32/RTL8169S-64 Datasheet 2. Features Fully compliant with IEEE 802.3, IEEE 802.3u, IEEE 802.3ab Supports IEEE 802.1Q VLAN tagging Serial EEPROM and/or Flash support 3.3V signaling, 5V PCI I/O tolerant Transmit/Receive FIFO (8K/64K) support Supports power down/link down power saving 128-pin QFP/233-pin TFBGA package Integrated 10/100/1000 transceiver Auto-Negotiation with Next page capability Supports PCI 2.
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RTL8169S-32/RTL8169S-64 Datasheet 4. Pin Assignments 4.1.
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RTL8169S-32/RTL8169S-64 Datasheet 4.2.
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RTL8169S-32/RTL8169S-64 Datasheet 5. Pin Descriptions The following signal type codes are used in the tables: I: Input. O: Output T/S: Tri-State bi-directional input/output pin. S/T/S: Sustained Tri-State. O/D: Open Drain. 5.1. Power Management/Isolation Table 1.
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RTL8169S-32/RTL8169S-64 Datasheet 5.2. PCI Interface Symbol Type PCIADPIN63-32 T/S PCIADPIN31-0 T/S CBEBPIN7-4 T/S CBEBPIN3-0 T/S Pin No. (128QFP) Table 2. PCI Interface Pin No.
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RTL8169S-32/RTL8169S-64 Datasheet Symbol Type I Pin No. (128QFP) 28 Pin No. (233BGA) M1 PCICLK DEVSELB S/T/S 68 T16 FRAMEB S/T/S 61 R13 GNTB I 29 N2 REQB T/S 30 P2 IDSEL I 46 U6 INTAB O/D 25 K3 IRDYB S/T/S 63 R14 TRDYB S/T/S 67 R16 Integrated Gigabit Ethernet Controller Description PCI clock: This clock input provides timing for all PCI transactions and is input for the PCI device. Supports up to a 66MHz PCI clock.
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RTL8169S-32/RTL8169S-64 Datasheet Symbol T/S Pin No. (128QFP) 76 Pin No. (233BGA) M16 M66EN I 88 F17 PERRB S/T/S 70 P17 SERRB O/D 75 N15 STOPB S/T/S 69 T17 PCIRSTB I 27 L3 ACK64B S/T/S K2 REQ64B S/T/S L2 T/S R2 PAR PAR64 Type Integrated Gigabit Ethernet Controller Description Parity: This signal indicates even parity across PCIADPIN31-0 and CBEB3-0 including the PAR pin. PAR is stable and valid one clock after each address phase.
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RTL8169S-32/RTL8169S-64 Datasheet 5.3. EEPROM Table 3. Symbol Type Pin No Pin No (128QFP) (233BGA) 111 A11 EESK O EEDI/AUX I 109 B11 EEDO O 108 A12 EECS/BRO MCSB O 106 B12 EEPROM Description Serial data clock EEDI: Serial data input AUX: Input pin to detect if Aux. Power exists or not on initial power-on. This pin should be connected to Boot PROM. To support wakeup from ACPI D3cold or APM power-down, this pin must be pulled high to aux. power via a resistor.
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RTL8169S-32/RTL8169S-64 Datasheet 5.5. Clock Table 5. Symbol Type Xtal1 I Xtal2 O Pin No Pin No (128QFP) (233BGA) 121 A5 122 A6 Clock Description Input of 25MHz clock reference. output of 25MHz clock reference. 5.6. Regulator & Reference Table 6. Pin No Pin No (128QFP) (233BGA) 8 E4 Regulator & Reference Symbol Type Description CTRL25 O CTRL18 O 125 B3 Regulator Control. Voltage control to external 1.8V regulator. RSET I 127 D4 Reference. External Resistor Reference.
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RTL8169S-32/RTL8169S-64 Datasheet 5.8. Power & Ground Table 8.
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RTL8169S-32/RTL8169S-64 Datasheet 6. Functional Description 6.1. Transceiver 6.1.1. Transmitter In 10M mode, the Tx MAC retrieves packet data from the Tx Buffer Manager and sends it out through the transmitting physical layer interface. The transmit 4-bit nibbles (TXD[3:0]) clocked at 2.5Mhz (TXC), are serialized into 10Mbps serial data. Then, the 10Mbps serial data is converted into a Manchester-encoded data stream and is transmitted onto the media by the DAC converter.
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RTL8169S-32/RTL8169S-64 Datasheet 6.3. Next Page If 1000Base-T mode is advertised, three additional Next Pages are automatically exchanged between the two link partners. Users can set Reg4.15 to 1 to exchange extra Next Pages via Reg7 and Reg8 as defined in IEEE 802.3ab. 6.4. MII/GMII Interface 6.4.1. MII The RTL8169S supports 10Mbps and 100Mbps link operation. During the operation, the PHY communicates with the MAC through the MII as defined in the IEEE 802.3 (clause 22) specifications.
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RTL8169S-32/RTL8169S-64 Datasheet 6.5. LEDs The RTL8169S supports four LED signals in four different configurable operation modes. The modes are shown in Pin Descriptions, page 5. 6.5.1. Link Monitor The Link Monitor senses a link, such as LINK10, LINK100, LINK1000, LINK10/100/1000. Whenever a link is established, the specific link LED pin is driven low. Once disconnected, the link LED pin is driven high indicating that no network connection exists. 6.5.2.
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RTL8169S-32/RTL8169S-64 Datasheet 6.5.3. TX LED In 10/100/1000Mbps mode, blinking of the Tx LED indicates that transmit activity is occurring. Power On LED = High Transmitting Packet? No Yes LED = High for (100 +- 10) ms LED = Low for (12 +- 2) ms Figure 4. Integrated Gigabit Ethernet Controller TX LED 15 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet 6.5.4. TX/RX LED In 10/100/1000Mbps mode, blinking of the Tx/Rx LED indicates that both transmit and receive activity is occurring. Power On LED = High Tx/Rx Packet? No Yes LED = High for (100 +- 10) ms LED = Low for (12 +- 2) ms Figure 5. Integrated Gigabit Ethernet Controller TX/RX LED 16 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet 6.5.5. LINK/ACT LED In 10/100/1000Mbps mode, blinking of the LINK/ACT LED indicates that the RTL8169S is linked and operating properly. When this LED is high for extended periods, it indicates that a link problem exists. Power On LED = High No Link? Yes LED = Low No Tx/Rx packet? Yes LED = High for (100 +- 10) ms LED = Low for (12 +- 2) ms Figure 6. LINK/ACT LED 6.6.
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RTL8169S-32/RTL8169S-64 Datasheet Registers. Software can read and write to the EEPROM using “bit-bang” accesses via the 9346CR Register. The interface consists of EESK, EECS, EEDO, and EEDI. Table 10. Flash MA[16:0] (PCIAD16:0) MD7-0(PCIAD31:24) CSB(EECS/BROMCSB) OEB(LED0/BROMOEB) EEPROM EECS EESK EEDI/Aux EEDO Flash/EEPROM Interface Description Boot PROM Address Bus. These pins are used to access up to a 128k-byte flash memory or EEPROM. Boot PROM data bus when in Boot PROM mode.
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RTL8169S-32/RTL8169S-64 Datasheet The D3cold_support_PME bit (bit15, PMC register) and the Aux_I_b2:0 bits (bit8:6, PMC register) in PCI configuration space depend on the existence of Aux power (bit15, PMC) = 1. If EEPROM D3cold_support_PME bit (bit15, PMC) = 0, the above 4 bits are all 0's. Example: If EEPROM D3c_support_PME = 1: • If Aux. power exists, then PMC in PCI config space is the same as EEPROM PMC (if EEPROM PMC = C2 F7, then PCI PMC = C2 F7) • If Aux.
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RTL8169S-32/RTL8169S-64 Datasheet A Wakeup Frame event occurs only when the following conditions are met: • The destination address of the received Wakeup Frame is acceptable to the RTL8110S, e.g. a broadcast, multicast, or unicast address to the current RTL8110S adapter. • The received Wakeup Frame does not contain a CRC error. • The PMEn bit (CONFIG1#0) is set to 1.
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RTL8169S-32/RTL8169S-64 Datasheet 7. Characteristics 7.1. Absolute Maximum Ratings WARNING: Absolute maximum ratings are limits beyond which permanent damage may be caused to the device, or device reliability will be affected. All voltages are specified reference to GND unless otherwise specified. Table 11.
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RTL8169S-32/RTL8169S-64 Datasheet 7.4. Thermal Characteristics Table 14. Parameter Storage temperature Operating temperature Thermal Characteristics Minimum -55 0 Maximum +125 70 Units °C °C 7.5. DC Characteristics Symbol Vil Parameter 3.3V Supply Voltage 1.8V Supply Voltage 2.
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RTL8169S-32/RTL8169S-64 Datasheet 7.6. AC Characteristics 7.6.1. Serial EEPROM Interface Timing 93C46(64*16)/93C56(128*16) EESK tcs EECS EEDI 1 (Read) 1 0 An A2 A1 A0 (Read) 0 EEDO High Impedance Dn D1 D0 EESK tcs EECS EEDI 1 (Write) 0 1 An ... A0 Dn ... D0 (Write) BUSY EEDO High Impedance READY twp tsk EESK tskh tcss tdis EECS tskl tcsh tdih EEDI tdos tdoh EEDO (Read) tsv EEDO STATUS VALID (Program) Figure 7. Table 16.
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RTL8169S-32/RTL8169S-64 Datasheet Symbol tdis tdih tdos tdoh tsv Parameter DI Setup Time DI Hold Time DO Setup Time DO Hold Time CS to Status Valid EEPROM Type 9346/9356 9346/9356 9346/9356 9346/9356 9346/9356 Min. 400/50 400/100 2000/500 Max. 2000/500 1000/500 Unit ns ns ns ns ns 7.7. PCI Bus Operation Timing 7.7.1. PCI Bus Timing Parameters Table 17.
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RTL8169S-32/RTL8169S-64 Datasheet V_th CLK V_test V_tl T_val OUTPUT DELAY V_trise, V_tfall Tri-State OUTPUT V_test V_test T_on T_off Figure 8. Output Timing Measurement Conditions V_th CLK V_test V_th INPUT V_test V_tl T_h T_su inputs valid V_test V_max V_tl Figure 9. Table 18. Input Timing Measurement Conditions Measurement Condition Parameters Symbol Level Units Vth 0.6Vcc V Vtf 0.2Vcc V Vtest 0.4Vcc V Vtrise 0.285Vcc V Vtfall 0.615Vcc V Vmax 0.
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RTL8169S-32/RTL8169S-64 Datasheet 7.7.2. PCI Clock Specification T_high T_low 0.6Vcc 0.5Vcc 0.4Vcc 0.3Vcc 0.4Vcc, peak-to-peak (minimum) 0.2Vcc T_cyc Figure 10. 3.3V Clock Waveform V_ih CLK (@ Device #1) V_test T_skew V_il T_skew V_ih T_skew CLK (@ Device #2) V_test V_il Figure 11. Table 19.
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RTL8169S-32/RTL8169S-64 Datasheet 7.7.3. PCI Transactions CLK 1 2 3 4 5 6 7 8 9 10 7 8 9 10 FRAMEB AD31-0 ADDRESS C/BE3-0B BUS CMD DATA BE3-0B IRDYB TRDYB DEVSELB Figure 12. I/O Read CLK 1 2 3 4 5 6 FRAMEB AD31-0 ADDRESS DATA C/BE3-0B BUS CMD BE3-0B IRDYB TRDYB DEVSELB Figure 13. Integrated Gigabit Ethernet Controller I/O Write 27 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 1 2 3 4 5 6 7 8 9 10 7 8 9 10 FRAMEB IDSEL AD31-0 ADDRESS C/BE3-0B BUS CMD DATA BE3-0B IRDYB TRDYB DEVSELB Figure 14. Configuration Read CLK 1 2 3 4 5 6 FRAMEB IDSEL AD31-0 ADDRESS DATA C/BE3-0B BUS CMD BE3-0B IRDYB TRDYB DEVSELB Figure 15. Integrated Gigabit Ethernet Controller Configuration Write 28 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 2 1 3 4 5 6 7 8 10 9 REQB-A REQB-B GNTB-A GNTB-B FRAMEB AD ADDRESS DATA ADDRESS Figure 16. DATA Bus Arbitration CLK 1 2 3 4 5 6 7 8 9 FRAMEB WAIT DATA TRANSFER BE3-0B IRDYB TRDYB DATA-3 WAIT BUS CMD DATA-2 DATA TRANSFER C/BE3-0B DATA-1 WAIT ADDRESS DATA TRANSFER AD31-0 DEVSELB Figure 17.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 2 1 3 4 5 6 7 8 9 FRAMEB DATA-2 DATA-3 TRDYB WAIT IRDYB BE3-0B-3 DATA TRANSFER DATA TRANSFER BUS CMD BE3-0B-1 BE3-0B-2 DATA TRANSFER C/BE3-0B DATA-1 WAIT ADDRESS WAIT AD31-0 DEVSELB Figure 18. Memory Write below 4GB (32-bit address, 32-bit data; 32-bit slot) CLK 1 2 3 4 5 6 7 8 9 FRAMEB IRDYB TRDYB STOPB DEVSELB Figure 19.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 2 1 3 4 5 6 7 8 9 FRAMEB IRDYB TRDYB STOPB DEVSELB Figure 20. Target Initiated Termination - Abort CLK 2 1 3 4 5 6 7 8 9 FRAMEB IRDYB TRDYB DEVSELB FAST Figure 21. Integrated Gigabit Ethernet Controller MED SLOW SUB NO RESPONSE ACKNOWLEDGE Master Initiated Termination - Abort 31 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 1 2 3 4 5 6 7 8 9 10 FRAMEB AD ADDRESS DATA ADDRESS DATA C/BE# BUS CMD BE# BUS CMD BE# PAR/PAR64 SERR# PERR# Figure 22. Integrated Gigabit Ethernet Controller Parity Operation – One Example 32 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 2 1 3 4 5 6 7 8 9 FRAMEB REQ64B AD31-0 DATA-1 ADDRESS DATA-2 DATA-3 AD63-32 BE3-0B BUS CMD C/BE7-4B WAIT DATA TRANSFER TRDYB WAIT WAIT IRDYB DATA TRANSFER BE7-4B DATA TRANSFER C/BE3-0B DEVSELB ACK64B Figure 23. Memory Read Below 4GB (32-bit address, 32-bit data transfer granted; 64-bit slot) Integrated Gigabit Ethernet Controller 33 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 1 2 3 4 5 6 7 8 9 FRAMEB REQ64B ADDRESS DATA-1 DATA-2 AD63-32 DATA-2 C/BE3-0B BUS CMD BE3-0B-1 BE3-0B-2 C/BE7-4B DATA-3 BE3-0B-3 WAIT DATA TRANSFER TRDYB WAIT IRDYB DATA TRANSFER DATA TRANSFER BE7-4B-1 WAIT AD31-0 DEVSELB ACK64B Figure 24. Memory Write below 4GB (32-bit address, 32-bit data transfer granted; 64-bit slot) Integrated Gigabit Ethernet Controller 34 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 2 1 3 4 5 6 7 8 9 FRAMEB REQ64B ADDRESS AD63-32 DATA-3 DATA-5 DATA-2 DATA-4 DATA-6 BE3-0B BUS CMD C/BE7-4B DATA TRANSFER TRDYB WAIT WAIT IRDYB DATA TRANSFER BE7-4B WAIT C/BE3-0B DATA-1 DATA TRANSFER AD31-0 DEVSELB ACK64B Figure 25. Memory Read below 4GB (32-bit address, 64-bit data transfer granted; 64-bit slot) Integrated Gigabit Ethernet Controller 35 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 2 1 3 4 5 6 7 8 9 FRAMEB AD31-0 ADDRESS DATA-2 DATA-4 DATA-6 C/BE3-0B BUS CMD BE3-0B-1 BE3-0B-2 BE3-0B-3 C/BE7-4B BE7-4B-1 BE7-4B-2 BE7-4B-3 TRDYB WAIT IRDYB WAIT AD63-32 WAIT DATA-5 DATA TRANSFER DATA-3 DATA TRANSFER DATA-1 DATA TRANSFER REQ64B DEVSELB ACK64B Figure 26. Memory Write below 4GB (32-bit address, 64-bit data transfer granted; 64-bit slot) Integrated Gigabit Ethernet Controller 36 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 1 2 3 4 5 6 7 8 9 10 FRAMEB DATA-1 DATA-2 DAC CMD BUS CMD DATA-3 TRDYB WAIT WAIT IRDYB DATA TRANSFER BE3-0B DATA TRANSFER C/BE3-0B HI-ADDR WAIT LO-ADDR DATA TRANSFER AD31-0 DEVSELB Figure 27.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 1 2 3 4 5 6 7 8 9 10 FRAMEB REQ64B HI-ADDR DAC CMD BUS CMD C/BE7-4B BUS CMD BE3-0B BE7-4B WAIT IRDYB TRDYB DATA TRANSFER C/BE3-0B DATA-3 WAIT HI-ADDR DATA-2 DATA TRANSFER AD63-32 DATA-1 WAIT LO-ADDR DATA TRANSFER AD31-0 DEVSELB ACK64B Figure 29. Memory Read above 4GB (DAC, 64-bit address, 32-bit data transfer granted; 64-bit slot) Integrated Gigabit Ethernet Controller 38 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 1 2 3 4 5 6 7 8 9 10 FRAMEB REQ64B DATA-2 DATA-3 DATA-2 DAC CMD BUS CMD BE3-0B-1 BE3-0B-2 TRDYB DATA TRANSFER IRDYB BE7-4B-1 WAIT BUS CMD BE3-0B-3 WAIT C/BE7-4B HI-ADDR DATA-1 WAIT C/BE3-0B HI-ADDR DATA TRANSFER AD63-32 LO-ADDR DATA TRANSFER AD31-0 DEVSELB ACK64B Figure 30.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 1 2 3 4 5 6 7 8 9 10 FRAMEB HI-ADDR DATA-1 DATA-3 DATA-5 DATA-2 DATA-4 DATA-6 C/BE3-0B DAC CMD BUS CMD BE3-0B C/BE7-4B BUS CMD BE7-4B WAIT IRDYB TRDYB WAIT HI-ADDR DATA TRANSFER AD63-32 WAIT LO-ADDR DATA TRANSFER AD31-0 DATA TRANSFER REQ64B DEVSELB ACK64B Figure 31. Memory Read above 4GB (DAC, 64-bit address, 64-bit data transfer granted; 64-bit slot) Integrated Gigabit Ethernet Controller 40 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet CLK 1 2 3 4 5 6 7 8 9 10 FRAMEB DATA-3 DATA-5 DATA-2 DATA-4 DATA-6 BE3-0B-3 BE7-4B-1 BE7-4B-2 BE7-4B-3 BUS CMD IRDYB TRDYB WAIT DAC CMD BUS CMD BE3-0B-1 BE3-0B-2 WAIT C/BE7-4B HI-ADDR DATA-1 WAIT C/BE3-0B HI-ADDR DATA TRANSFER AD63-32 LO-ADDR DATA TRANSFER AD31-0 DATA TRANSFER REQ64B DEVSELB ACK64B Figure 32.
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RTL8169S-32/RTL8169S-64 Datasheet 8. Mechanical Dimensions 8.1. 128-Pin QFP Mechanical Dimensions See the Mechanical Dimensions notes on the next page. Integrated Gigabit Ethernet Controller 42 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet 8.2. Notes for 128-Pin QFP Dimensions Symbol Dimensions in inches Notes: Dimensions in mm Min Typical Max Min Typical Max 1. Dimensions D & E do not include interlead flash. A - - 0.134 - - 3.40 A1 0.004 0.010 0.036 0.10 0.25 0.91 2. Dimension b does not include dambar rotrusion/intrusion. 3. Controlling dimension: Millimeter A2 0.102 0.112 0.122 2.60 2.85 3.10 4. General appearance spec. c 0.002 0.006 0.010 0.05 0.15 0.25 D 0.
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RTL8169S-32/RTL8169S-64 Datasheet 8.3. 233-PIN TFBGA Mechanical Dimensions See the Mechanical Dimensions notes on the next page. Integrated Gigabit Ethernet Controller 44 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet 8.4. Notes for 233-Pin TFBGA Dimensions Integrated Gigabit Ethernet Controller 45 Track ID: JATR-1076-21 Rev. 1.
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RTL8169S-32/RTL8169S-64 Datasheet 9. Ordering Information Table 20. Part number RTL8169S-32 RTL8169S-64 Ordering Information Package 128-pin QFP 233-pin TFBGA Status Realtek Semiconductor Corp. Headquarters 1F, No. 2, Industry East Road IX, Science-based Industrial Park, Hsinchu, 300, Taiwan, R.O.C. Tel: 886-3-5780211 Fax: 886-3-5776047 www.realtek.com.tw Integrated Gigabit Ethernet Controller 46 Track ID: JATR-1076-21 Rev. 1.