Datasheet

RTL8169S-32/RTL8169S-64
Datasheet
Integrated Gigabit Ethernet Controller 10 Track ID: JATR-1076-21 Rev. 1.4
5.5. Clock
Table 5. Clock
Symbol Type Pin No
(128QFP)
Pin No
(233BGA)
Description
Xtal1 I 121 A5 Input of 25MHz clock reference.
Xtal2 O 122 A6 output of 25MHz clock reference.
5.6. Regulator & Reference
Table 6. Regulator & Reference
Symbol Type Pin No
(128QFP)
Pin No
(233BGA)
Description
CTRL25 O 8 E4 Regulator Control. Voltage control to external 2.5V regulator.
CTRL18 O 125 B3 Regulator Control. Voltage control to external 1.8V regulator.
RSET I 127 D4 Reference. External Resistor Reference.
5.7. LEDs
Table 7. LEDs
Symbol Type Pin No
(128QFP)
Pin No
(233BGA)
Description
LED0/
BROMO
EB
O 117 C10
LED1 O 115 D10
LED2 O 114 C11
LED3 O 113 D9
LEDS1-0 00 01 10 11
LED0
Tx/Rx ACT(Tx/Rx) Tx LINK10/
ACT
LED1
LINK
100
LINK10/100
/1000
LINK10/100
/1000
LINK100/
ACT
LED2
LINK
10
FULL Rx FULL
LED3
LINK
1000
- FULL LINK1000/
ACT
BROMOEB: This enables the output buffer of the Boot PROM or Flash
memory during a read operation.
Note 1: During power down mode, the LED signals are logic high.
Note 2: LEDS1-0’s initial value comes from 93C46/93C56.