Datasheet

RTL8169S-32/RTL8169S-64
Datasheet
Integrated Gigabit Ethernet Controller 13 Track ID: JATR-1076-21 Rev. 1.4
6.3. Next Page
If 1000Base-T mode is advertised, three additional Next Pages are automatically exchanged between the two link partners.
Users can set Reg4.15 to 1 to exchange extra Next Pages via Reg7 and Reg8 as defined in IEEE 802.3ab.
6.4. MII/GMII Interface
6.4.1. MII
The RTL8169S supports 10Mbps and 100Mbps link operation. During the operation, the PHY communicates with the MAC
through the MII as defined in the IEEE 802.3 (clause 22) specifications. The MII consists of a transmit data interface (TxEN,
TxER, TXD[3:0], and TxCLK), a receive data interface (RxDV, RxER, RXD[3:0], and RxCLK), two status signals (CRS and
COL) and a management interface (MDC and MDIO). In this mode of operation, both Transmit and Receive clocks are
supplied by the PHY.
6.4.2. GMII
In 1000Base-T mode, the GMII interface is selected, the 125MHz transmit clock is expected on GTXCLK, TXCLK sources
25MHz, 2.5MHz, or 0MHz clock depending on the operation mode, and RXCLK sources the 125MHz receive clock.