Datasheet

Intel
®
E8870 Scalable Node Controller (SNC) Datasheet 4-11
System Address Map
Global interleave range 2 extends from 10 to 12 GB. It consists of two 1-GB blocks interleaved
across SNCs 0 and 1. Even ways 00 and 10 belong to SNC0. Odd ways 01 and 11 belong to SNC1.
Global interleave range 3 extends from 12 to 13 GB. It consists of two 500-MB blocks interleaved
across SNCs 0 and 1. SNC0 MIR[3] defines a local interleave that spans multiple global
interleaves. This is possible whenever a single technology can occupy the same way in
consecutive global interleaves.
Global interleave range 4 extends from 13 to 14 GB. It consists of two 500 MB blocks interleaved
across SNCs 0 and 2. Although the memory in Global interleave 5 is interleaved the same way, a
new MIR must be used because global interleave 4 started at 13 GB. To satisfy the rule that a
MIR must start at a multiple of its size, the maximum size of Global Interleave 4 is 1 GB.
Global interleave range 5 extends from 14 GB to 16 GB. It consists of two 1-GB blocks interleaved
across SNCs 0 and 3.
4.1.5.4 Recovering Main Memory Behind Other Regions: Reflections
To recover the memory behind the range from MMIOL to 4GB, MIRs can be used to map physical
memory to multiple addresses (reflection).
Figure 4-5 illustrates how memory lost behind System and MMIO spaces can be recovered in the
second image of a given interleave range. In this example, Firmware and MMIO cover portions of
the Memory Interleave Range (defined by MIR1) between 2 and 4 GB. The memory behind these
spaces is unusable at these addresses.
Figure 4-5. Reflections Used to Recover Memory Behind Enabled Spaces
001148
MIR 2 Maps the
Same Physical
Memory at 6-8 GB
Spaces Defined by
Chipset Registers
Spaces Reported to
Operating System
Memory
Block 2
MIR 1 Maps 2 GB
of Memory at
2-4 GB
System
MMIO
System
MMIO
Memory Block 1
Alias of
Block 1
8 GB
4GB
2GB
0