Datasheet

Intel
®
E8870 Scalable Node Controller (SNC) Datasheet 4-13
System Address Map
4.2.1.3 SIOH Registers
4.2.1.4 Routing by SP Attribute
The E8870 chipset routes requests according to the type and address of the request and chipset
configuration register settings. In order to simplify routing, some E8870 chipset components pass
destination information to others in non-coherent request packets. Coherent accesses do not use the
Attr field for routing. This destination information is encoded in the Attr field of the request packet.
Subsequent components will route according to the Attr field. Refer to Table 4-5 for the destination
encoding used for routing by the chipsets.
Table 4-3. SPS Memory Mapping Registers
Name Function
MIR[5:0] Defines the home node for each cache line of main memory.
MMIOLS Splits the low MMIO range into subranges that are routed to different SIOHs.
MMIOHS Splits the high MMIO range into subranges that are routed to different SIOHs.
VGA_PORT Defines the port number of the SIOH that holds the VGA bus.
CB_PORT Defines the port number of the SIOH that holds the compatibility bus.
SARS Splits the SAR range into subranges that are routed to different SIOHs.
IOPORTS Splits the I/O space into subranges that are routed to different SIOHs.
IOH_MAP Defines the two ports that may have SIOHs attached.
Table 4-4. SIOH Memory Mapping Registers
Name Function
MMIOSL[5:0] Defines the range of Memory Mapped I/O Region for each Hub Interface
< 4 GB.
MMIOSH[5:0] Defines the range of Memory Mapped I/O Region for each Hub Interface
> 4 GB.
MMIOBL, MMIOLL Defines the total range of Memory Mapped I/O Region that is < 4 GB.
MMIOBH, MMIOLH Defines the total range of Memory Mapped I/O Region that is > 4 GB.
IOCTL Defines Compatibility and VGA Hub Interface ports.
SSEG[5:0] Sub-divides the SAPIC range allowed to an SIOH into 9 sub-ranges. Each
16-bit Hub Interface gets two subranges, The 8-bit Hub Interface gets 1.
IOL[5:0] Defines the range per Hub Interface port of I/O space.
Table 4-5. Destinations (ATTR)
Destination Encoding Description
DND 0000
Destination not decoded. This field is not used for routing
requests of this type.
VGA 0101 Graphics cards.
DRAM 0011 Main memory.
MMIO 0010 Memory mapped I/O.
CB 0100 Compatibility bus.
INT 0001 Interrupt to be delivered to processor bus.