Datasheet

Intel
®
E8870 Scalable Node Controller (SNC) Datasheet 4-19
System Address Map
4.3.2 Outbound I/O Access
The E8870 chipset allows I/O addresses to be mapped to resources supported on the I/O buses
underneath the E8870 chipset controller. This I/O space is partitioned into 32 2KB segments. Each
of the I/O buses can have from 0 to 32 segments mapped to it. Each PCI bus gets contiguous
blocks. All PCI buses on a given SIOH must be assigned contiguous blocks. The lowest block,
from 0 to 0FFFh, is always sent to the compatibility bus.
4.3.2.1 Outbound I/Os
The SNC applies these routing rules in order: (A[2:0]# for the following is not physically present
on the processor bus, but are calculated from BE[7:0])
1. I/O Addresses Used for MDA Controllers:
If the MDASE bit in the ASE register is set, and any of the bytes addressed meet this test
(A[15:10] are ignored for this decode): A[9:0] = 3B4h, 3B5h, 3B8h, 3B9h, 3BAh, or 3BFh , an
I/O Read/Write will be sent out the default SP with Attr = CB. For example, a 4-byte read
Figure 4-6. System I/O Address Space
001149
+3 Bytes
(Decoded as 0 000X)
Segment 31
Segment 3
Segment 2
Segment 1
Compatibility Bus Only
Segment 0
Compatibility Bus Only
1_0003
FFFF
F800
2000
1800
1000
800
0000