Datasheet

Reliability, Availability, and Serviceability
6-6 Intel
®
E8870 Scalable Node Controller (SNC) Datasheet
6.1.1.1 Exceptions
•
No checks will be done on FWH and configuration register read transactions.
• Write to FWH will be checked at processor bus. Processor bus errors will be logged. Failing
FWH write data will not be logged.
6.1.2 Data Poisoning
Data covered by SEC/DED ECC is poisoned by flipping checkbits[7:1].
Memory write data, which is covered by chipset memory ECC, is poisoned by flipping symbol g
on RAC1 and RAC3. This will be detected as a non-correctable Memory ECC error when the
memory location is read. When this happens, all four SEC/DED code words that correspond to the
Memory ECC code word will be poisoned and propagated to the requestor.
When data is covered by parity it is poisoned by flipping all parity bits associated with the data.
6.1.3 Error Reporting
6.1.3.1 Error Status and Log Registers
Error status registers are provided: FERRST (first error status register), and SERRST (second error
status register). First fatal and/or first non-fatal errors are flagged in the FERRST register,
subsequent errors are indicated in the SERRST. Associated with some of the errors flagged in the
FERRST register are control and data logs. SP0 and SP1 share logging registers (RECSPL and
REDSPL). The SPL Fatal Data Error Pointer bit in the FERRST register records which SP detected
the error.
The contents of FERRST and SERRST are “sticky” across a reset (while PWRGOOD remains
asserted). This provides the ability for firmware to perform diagnostics across reboots. Note that
only the contents of FERRST affects the update of the any error log registers.
6.1.3.2 Error Logs
For some errors, control and/or data logs are provided. The “non-recoverable” error logs are used
to log information associated with first fatal errors. The “recoverable” error logs are used for first
non-fatal errors.
Once a first error for a type (fatal, non-fatal, recoverable) of error has been flagged (and logged),
the log registers for that error type remain fixed until either (1) any errors in the FERRST register
for which the log is valid are cleared or, (2) a power-on reset.
6.1.3.3 Error Signaling
Three open-drain error pins are associated with each of FERRST/SERRST register, one for each
error type: fatal, uncorrectable and correctable (ERR[2:0]# respectively). If not masked (ERRMSK
register), these pins will reflect the error status of each type in the two error status registers. The
value of the error pins when an error is flagged is also stored in the FERRST to facilitate the
identification of the first error in the system. For example, when a first fatal error is detected on the
component, the value of the error status pin associated with fatal errors is also latched into the
FERRST.