Datasheet

Clocking
7-2 Intel
®
E8870 Scalable Node Controller (SNC) Datasheet
Figure 7-1. Clock Distribution Scheme
DMH
DMH
Memory Connector
DMCG
CPU Node Connector 1
Clock
Gen.
Distr.
Buffer
Spares
CK-HBUF System Bus Clock Driver CK-HBUF System Bus Clock Driver
I/O Connector
SNC
CK-
MREF
DMCG
Memory Connector
CPU Node Connector n
P64-
H2
P64-
H2
P64-
H2
SIOH
CKFF
PCI
Clock
Buffer
66MHz
66MHz FBCLK
66MHz
33MHz
Legacy Connector
66MHz
48MHz
66MHz
n 33/66/100/133MHz
PCI Slot 0
PCI Slot n
FWH
48MHz
DMH
SPS
DMH
FWH
ICH4
n
33MHz
FWH
FWH
FWH
2
2
2
2
PCLK/M
x4
SYNCLK/N
x4
LVPECL Distribution
LVHSTL Distribution
Other Distribution
14.3MHz
Ext. Clock
Source
33MHz
FWH
CTM / CFM
to/from MRH-Ds
x4 pairs
2
2
Processor n
Processor 0
RAC Interface Clocks
Differential Clocks
Single-Ended Clocks