Datasheet
Intel
®
E8870 Scalable Node Controller (SNC) Datasheet 8-1
System Reset 8
8.1 Reset Types
The Intel E8870 chipset supports several reset types. Table 8-1 describes their causes,
characteristics and the sequences they trigger. describes these sequences in detail.
Table 8-1. Intel
®
E8870 chipset Reset Types
Reset Type Triggered by Description Sequence
Power-up Reset
Section 8.2.1
System power logic or
reset button results in
PWRGOOD assertion. This
must be followed by a
RESETI# deassertion.
Resets all E8870 chipset
components to a known
reset state.
Produces a sync point for
deterministic resets to
follow.
PWRGOOD Deassertion,
PWRGOOD Assertion,
Hard Reset Deassertion
Hot-Plug Power-up
Section 8.2.1
One component powers up
while the rest of the system
is in normal operation.
Resets the hot-plugged
module to a known reset
state.
Determinism is no longer
possible after the module
is brought on-line.
PWRGOOD Deassertion,
PWRGOOD Assertion,
Hard Reset Deassertion
Hard Resets Second and successive
RESETI# assertions.
Ultimate cause depends on
system RESETI#
distribution.
Resets all E8870 chipset
components to a known
reset state.
Hard Reset Assertion,
Hard Reset Deassertion
Deterministic
Hard Reset
Section 8.2.2.6
SNC SYRE.SysHardReset
configuration bit. This
asserts RESETO# which
may be routed to RESETI#.
A type of Warm Reset that
produces determinism.
Processor-Only
Hard Reset
Section 8.2.2.7
Second and successive
RESETI# assertions,
steered by system logic to
appropriate components.
A type of Warm Reset that
only affects SNCs and
processors. E8870 chipset
configuration is preserved.
SNC Local Hard
Reset
Section 8.2.2.7
SNC SYRE.SNCReset
configuration bit.
Warm Reset to SNC,
processors, DMH and LPC
components.
Hard Reset Assertion,
Hard Reset Deassertion
SIOH Local Hard
Reset
Section 8.2.2.7
SIOH SYRE.SIOHReset
configuration bit.
A hard reset that only
affects components
controlled by the SIOH.
BINIT# Reset Processor bus BINIT# SNC is reset.
Local memory access is
provided after reset.
Hard Reset Assertion,
Hard Reset Deassertion
Soft Reset
Section 8.2.3
If SNC drives INIT#,
SNC.SoftReset
configuration bit.
If ICH4 drives INIT#, I/O
events.
Forces the processor to
start execution at the boot
vector.
INIT# Assertion