Datasheet

Intel
®
E8870 Scalable Node Controller (SNC) Datasheet 3-3
Configuration Registers
3.2.6 CBCA3: Chip Boot Configuration Alias
This register may be read or written only by 4-byte accesses.
3.3 SNC I/O Space Registers
3.3.1 CFGADR: Configuration Address Register
CFGADR is written only when a processor I/O transaction to CF8 is:
• Referenced as a Dword.
• The Bus Number field matches the Bus field in the CBC register.
• The Device Number matches the NodeID field in the CBC register.
A Byte or Word reference will not access this register, but will generate a I/O read and write on SP.
If the reference is Dword, but the Bus Number and Device Number do not match, a configuration
read/write on the SP will be sent out
. The CFGADR register contains the Bus Number, Device
Number, Function Number, and Register Number for which a subsequent CFGDAT access is
intended.
Memory Address:FE62_7C00h
Bits 95:64 of the register described in Section 3.8.7.
I/O Address:CF8h
Bit Attr Default Description
31 RW 0
CFGE
Configuration Enable Unless this bit is set, accesses to the CFGDAT
register will not produce a configuration access, but will be treated as other I/O
accesses. This bit is strictly an enable for the CFC/CF8 access mechanism
and is not forwarded to PCONR/W address.
30:24 RV 0 Reserved
23:16 RW 0
Bus Number
Compared against CBC.Bus to define local SNC configuration space.
15:11 RW 0
Device Number
Compared against CBC.NodeID to define local SNC configuration space.
10:8 RW 0
Function Number
This field is used to select the function of a locally addressed register.
If this field is 0, 1, 2, or 3, this field specifies the SNC function of the addressed
register.
Otherwise, writes will be discarded and reads will return all ones as defined by
the PCI specification.
7:2 RW 0
Register Offset
If this register specifies an access to SNC registers, this field specifies a group
of four bytes to be addressed. The bytes accessed are defined by the Byte
enables of the CFGDAT register access.
Otherwise, writes will be discarded and reads will return all 0s as defined by
the PCI specification.
1:0 RW* 0 Writes to these bits will have no effect; reads return 0.