Datasheet

Configuration Registers
3-26 Intel
®
E8870 Scalable Node Controller (SNC) Datasheet
3.8.4 SPAD: Scratch Pad
This register provides 32 bits of storage for power-on software usage before memory is configured.
This register is used during the boot process and SP Hot-Plug. This register is also memory
mapped. See Section 3.2, “SNC Fixed Memory Mapped Registers.”
3.8.5 SPADS: Sticky Scratch Pad
This register provides 32 bits of sticky storage for power-on software usage before memory is
configured. The content of this register remains sticky through reset. This regster is used during the
boot process and SP Hot-Plug. This register is also memory mapped. See Section 3.2, “SNC Fixed
Memory Mapped Registers.”
9RO0
Enable BERR# Input
Captured from A[9]#. If set, the SNC will enable BERR# reporting.
8RO0
A[8]# Value
Captured from A[8]#. The use of these address bits during reset is reserved.
7RO0
In-order Queue Depth 1
Captured from A[7]#. If set, the SNC will limit its In-Order Queue Depth to 1,
instead of the usual 8.
6RO0
1 MEG Power-on Reset Vector
Captured from A[6]#. Indicates that all agents on the host bus will begin
fetching code below 1MB (000F_FFF0h) instead of below 4GB
(00_FFFF_FFF0h).
5:4
RO/
RV
0
A[5:4]# Value
Captured from A[5:3]#. The use of these address bits during reset is reserved.
3
RO/
RV
0
Capture A[3]#
The use of these address bits during reset is reserved by the processor.
2:0
RO/
RV
0
Capture A[34:32]#
The use of these address bits during reset is reserved by the processor.
Device: NodeID
Function: 0
Offset: 48h (Continued)
Bit Attr Default Description
Device: NodeID
Function: 0
Offset: C4h
Bit Attr Default Description
31:0 RW 0 Scratch pad value.
Device: NodeID
Function: 0
Offset: C8h
Bit Attr Default Description
31:0 RWS 0
Scratch pad value
The contents of this register is sticky.