Datasheet
Intel
®
E8870 Scalable Node Controller (SNC) Datasheet 3-27
Configuration Registers
3.8.6 BOFL: Boot Flag
This register is used to select boot strap CPU. The first time this register is read, it will return a
non-zero signature. All reads thereafter will return 0s. This register can be re-initialized to the
default value by the Boot Flag Reset bit in the SYRE register.This register is also memory mapped.
See Section 3.2, “SNC Fixed Memory Mapped Registers.”
3.8.7 CBC: Chip Boot Configuration
This register is used to relocate E8870 chipset’s configuration space to a different PCI bus.
Information captured from the idle flits is valid only when the Idle detected bit in the SPINCO
register is set. The default value may be overwritten with any value before becoming valid. The bus
[7:0] may not be written to 0, which is reserved for the compatibility bus.
Device: NodeID
Function: 0
Offset: 74h
Bit Attr Default Description
31:8 RV 0 Reserved
7:0
RO*
(see Description)
A5h Signature
Device: NodeID
Function: 2
Offset: 74h(31:0), 78h(63:32),7Ch(71:64)
Bit Attr Default Description
95:79 RV 0 Reserved
78 RO CPUPRES Pin
CPU Present
This bit reflects the state of the CPUPRES pin.
0 = No CPU is present on this node
1 = at least one CPU is present
77 RW 0
Node Initialization Done
When set, local node initialization is done by the node BSP.
76:72 RW NODEID Pins at Reset
Node ID [4:0]
Those bits define the device number of this SNC. The default
value is captured from the NODEID pins on the rising edge of
RESETI#. This information is used for configuration accesses
steering and to set fields in the SP packet. They are sent in the
SP idle flits to connected components.
71:67 RW 11111
Bus [7:3]
The top five bits of this chip’s configuration bus number. They are
sent in the SP idle flits to connected components. This value
should not be changed for E8870 chipset-based systems. This
value may be overwritten if the SNC is used in other systems.
66:64 RW BUSID Pins at Reset
Bus [2:0]
The lower three bits of this chip’s configuration bus number. The
default value is captured from the BUSID pins on the rising edge
of RESETI#. See device mapping for details. They are sent in
the SP idle flits to connected components.
63:45 RV 0 Reserved