Datasheet

Configuration Registers
3-28 Intel
®
E8870 Scalable Node Controller (SNC) Datasheet
3.8.8 SPC: Scalability Port Control Register
This register controls the SP cluster.
44:40 RO 11111
SP1 Node ID [4:0]
Device # received from SP1’s idle flits.
39:32 RO FFh
SP1 Bus [7:0]
Bus # received from SP1’s idle flits.
31:16 RV 0 Reserved
15 RWS 0
StopOnErr
0 - An agent will send idle or info flits when in
RETRY_LOCAL_IDLE state.
1 - If an agent has detected an error and has sent an LLRReq
and its local retry state machine is in RETRY_LOCAL_IDLE
state, then it should not send any info or idle flits and sends a Ctrl
flit with LLRIdle.
14 RWS 0
SndMultAck
0 - 0 or 1 ACK is sent in LCC[7] of idle flits. Byte D = 0.
1 - LCC[7] = 0. Up to 25 ACKs will be sent in Byte D[4:0] of idle
flits. Idle flits are forced whenever there are multiple acks to
send.
13 RWS 0
RcvMultAck
0 - 0 or 1 ACK is extracted from LCC[7] of idle flits.
1 - Up to 25 ACKs may be extracted from idle flits. Ack[4:0] =
LCC[7] || Byte D[4:0]. Any particular idle flit will use either LCC[7]
or Byte D, but not both.
12:8 RO 11111
SP0 Node ID [4:0]
Device number received from SP0’s idle flits.
7:0 RO FFh
SP0 Bus [7:0]
Bus number received from SP0’s idle flits.
Device: NodeID
Function: 2
Offset: 74h(31:0), 78h(63:32),7Ch(71:64) (Continued)
Bit Attr Default Description
Device: NodeID
Function: 2
Offset: 70h
Bit Attr Default Description
31:1 RV 0 Reserved
0RW1
SPBS: Single Processor Bus System
This bit should be set when the SNC is directly connected to an SIOH. The
SNC must order coherency operations according to the processor bus order,
rather than rely on the SPS to provide ordering information.