Datasheet

Intel
®
E8870 Scalable Node Controller (SNC) Datasheet 3-53
Configuration Registers
3.10.9 FSBPMEH[1:0]: Processor Bus Performance Monitor
Events HI
This register is the most significant one of the two used to select bus events. Use of the event
registers is mutually exclusive with other processor bus event registers. Each major bit field in the
register is AND’ed with other major bit fields to select the event. If one field does not match, then
the counter will not count.
17:5 RW 0
Request Type (AND’ed Group)
1xxxxxxxxxxxxDeferred Phase (OR’ed with other group qualifications,
not AND’ed)
x1xxxxxxxxxxxDeferred Replies (Address range must be programmed
inactive)
xx1xxxxxxxxxxInterrupt Acknowledge
xxx1xxxxxxxxxSpecial Cycles
xxxx1xxxxxxxxCache Line Replacement
xxxxx1xxxxxxxMemory Read Current
xxxxxx1xxxxxxI/O Reads
xxxxxxx1xxxxxI/O Writes
xxxxxxxx1xxxxMemory Read Invalidates
xxxxxxxxx1xxxMemory Code Reads
xxxxxxxxxx1xxMemory Data Reads
xxxxxxxxxxx1xNon-Retryable Writes (non snooped)
xxxxxxxxxxxx1Retryable Writes (snooped)
4:0 RW 0
Cycle Length (AND’ed Group)
1xxxx Length = 128 bytes
x1xxx Length = 64 bytes
xx1xx Length = 32 bytes
xxx1x Length = 16 bytes
xxxx1 Length =< 8 bytes
Device: NodeID
Function: 3
Offset: ACh (FSBPMEL0), ECh(FSBPMEL1) (Continued)
Bit Attr Default Description
Device: NodeID
Function: 3
Offset: B0h (FSBPMEH0), F0h(FSBPMEH1)
Bit Attr Default Description
31:19 RV 0 Reserved
18:15 RV 0 Reserved
14:13 RW 0
Processor Thread (If Supported by Processor)
Note: If Threads are not supported by the processor select “11” for this field.
01 - Thread0
10 - Thread1
12:11 RW 0
Core ID (If Supported by Processor)
Note: If Core ID is not supported by the processor select “11” for this field.
01 - Core 0
10 - Core 1
10:9 RW 0
Local or Remote
Local node access versus remote node accesses from the processor bus.
01 - local only
10 - remote only