Datasheet

Intel
®
E8870 Scalable Node Controller (SNC) Datasheet 3-55
Configuration Registers
3.10.11 FSBPMEU[1:0]: Processor Bus Perform Monitor Utilization
Events
This register is used to select bus related utilization events, (i.e., to count number of clocks the
selected comparison is active). Use of this event register is mutually exclusive with other processor
system bus event registers. Each of these bit fields are OR’ed together, except the Threshold
Comparison field, which is a comparison value for the Queue of Buffer Select field. In all cases the
clock frequency used to measure a clock count is the system clock (200 MHz).
7:4 RW 0
Queue Events
This field selects a queue to monitor and which event measurement to make
for that queue. The “no measurement” selection should be selected to disable
this measurement.
7:6 - Queue selection
• 00 - In Order Queue
• 01 - Read Queue
• 10 - Write Queue
• 11 - SP Output Request Queue
5:4 - Queue measurement
• 00 - No measurement
• 01 - Input Arrival
• 10 - Output Arrival
• 11 - Output Departure
3:0 RW 0
Data Buffer Allocation Event (OR’ed group)
This register selects the destination and cycle type when a transaction is
allocated to the data buffer.
1xxx Remote Write
x1xx Remote Read
xx1x Local Write
xxx1 Local Read
Device: NodeID
Function: 3
Offset: B4h (FSBPMER0), F4h(FSBPMER1) (Continued)
Bit Attr Default Description
Device: NodeID
Function: 3
Offset: B8h (FSBPMEU0), F8h (FSBPMEU1)
Bit Attr Default Description
31:23 RV 0 Reserved
22:20 RW 0
Queue or Buffer Select
This field selects the queue or buffer to compare with the Threshold Comparison
field. Clocks are counted (utilization), if the number of entries in the queue are
greater than the value in the Threshold Comparison field.
000 None
001 In Order Queue
010 Memory Read Queue
011 Memory Write Queue
100 Data Buffer
101 LATT – Local Address Transaction Table
110 RATT – Remote Address Translation Table
111 SP Outbound Request Queue