Datasheet

71M6513/71M6513H
3-Phase Energy Meter IC
DATA SHEET
SEPTEMBER 2011
© 2005-2011 Teridian Semiconductor Corporation Page: 51 of 104
A Maxim Integrated Products Brand
CKTEST
TMUXOUT/RTM
FLAG
RTM DATA0 (32 bits)
LSB
SIGN
LSB
SIGN
RTM DATA1 (32 bits)
LSB LSB
SIGN
SIGN
RTM DATA2 (32 bits)
RTM DATA3 (32 bits)
0 1 30 31 0 1 30 31 0 1 30 31
0 1 30 31
FLAG
FLAG
FLAG
MUX_SYNC
CK32
Figure 14: RTM Output Format
SCLK (Output)
SSDATA (Output)
SFR (Output)
SRDY (Input)
31 30
16 15
1 0 31
SSI_BEG
30
16 15
1 0 31
SSI_BEG+1
1 0
SSI_END
If 16bit fields If 32bit fields
If SSI_CKGATE =1
If SSI_CKGATE =1
MUX_SYNC
Figure 15: SSI Timing, (SSI_FPOL = SSI_RDYPOL = 0)
SCLK (Output)
SSDATA (Output)
SFR (Output)
SRDY (Input)
31 30 16 15 14 13
16 16 16
12
29 18
17
Next field is delayed while SRDY is low
Figure 16: SSI Timing, 16-bit Field Example (External Device Delays SRDY)
SFR is the framing pulse. Although CE words are always 32 bits, the SSI interface will frame the entire data block as a single
field, as multiple 16-bit fields, or as multiple 32-bit fields. The SFR pulse is one SCLK clock cycle wide, changes state on the
rising edge of SCLK and precedes the first bit of each field.