Datasheet
Table Of Contents
- 1 Hardware Description
- 1.1 Hardware Overview
- 1.2 Analog Front End (AFE)
- 1.3 Digital Computation Engine (CE)
- 1.4 80515 MPU Core
- 1.4.1 Memory Organization and Addressing
- 1.4.2 Special Function Registers (SFRs)
- 1.4.3 Generic 80515 Special Function Registers
- 1.4.4 Special Function Registers (SFRs) Specific to the 71M6531D/F and 71M6532D/F
- 1.4.5 Instruction Set
- 1.4.6 UARTs
- 1.4.7 Timers and Counters
- 1.4.8 WD Timer (Software Watchdog Timer)
- 1.4.9 Interrupts
- 1.5 On-Chip Resources
- 1.5.1 Oscillator
- 1.5.2 Internal Clocks
- 1.5.3 Real-Time Clock (RTC)
- 1.5.4 Temperature Sensor
- 1.5.5 Physical Memory
- 1.5.6 Optical Interface
- 1.5.7 Digital I/O – 71M6531D/F
- 1.5.8 Digital I/O – 71M6532D/F
- 1.5.9 Digital IO – Common Characteristics for 71M6531D/F and 71M6532D/F
- 1.5.10 LCD Drivers – 71M6531D/F
- 1.5.11 LCD Drivers – 71M6532D/F
- 1.5.12 LCD Drivers – Common Characteristics for 71M6531D/F and 71M6532D/F
- 1.5.13 Battery Monitor
- 1.5.14 EEPROM Interface
- 1.5.15 SPI Slave Port
- 1.5.16 Hardware Watchdog Timer
- 1.5.17 Test Ports (TMUXOUT pin)
- 2 Functional Description
- 3 Application Information
- 3.1 Connection of Sensors
- 3.2 Connecting 5-V Devices
- 3.3 Temperature Measurement
- 3.4 Temperature Compensation
- 3.5 Connecting LCDs
- 3.6 Connecting I2C EEPROMs
- 3.7 Connecting Three-Wire EEPROMs
- 3.8 UART0 (TX/RX)
- 3.9 Optical Interface (UART1)
- 3.10 Connecting the V1 Pin
- 3.11 Connecting the Reset Pin
- 3.12 Connecting the Emulator Port Pins
- 3.13 Connecting a Battery
- 3.14 Flash Programming
- 3.15 MPU Firmware
- 3.16 Crystal Oscillator
- 3.17 Meter Calibration
- 4 Firmware Interface
- 4.1 I/O RAM and SFR Map – Functional Order
- 4.2 I/O RAM Description – Alphabetical Order
- 4.3 CE Interface Description
- 5 Electrical Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 Recommended External Components
- 5.3 Recommended Operating Conditions
- 5.4 Performance Specifications
- 5.4.1 Input Logic Levels
- 5.4.2 Output Logic Levels
- 5.4.3 Power-Fault Comparator
- 5.4.4 Battery Monitor
- 5.4.5 Supply Current
- 5.4.6 V3P3D Switch
- 5.4.7 2.5 V Voltage Regulator
- 5.4.8 Low-Power Voltage Regulator
- 5.4.9 Crystal Oscillator
- 5.4.10 LCD DAC
- 5.4.11 LCD Drivers
- 5.4.12 Optical Interface
- 5.4.13 Temperature Sensor
- 5.4.14 VREF
- 5.4.15 ADC Converter, V3P3A Referenced
- 5.5 Timing Specifications
- 5.6 Typical Performance Data
- 5.7 71M6531D/F Package
- 5.8 71M6532D/F Package
- 5.9 Pin Descriptions
- 6 Ordering Information
- 7 Related Information
- 8 Contact Information
- Appendix A: Acronyms
- Appendix B: Revision History
FDS 6531/6532 005 Data Sheet 71M6531D/F-71M6532D/F
Rev 2 35
TCON. 1 ( IE0 )
Individual
Enable Bits
S 1 CON. 0 ( RI1 )
S 1 CON. 1 ( TI1 )
Individual Flags
Internal
Source
> = 1
TCON. 5 ( TF0 )
TCON. 3 ( IE1 )
TCON. 7 ( TF1 )
S 0 CON. 0 ( RI0 )
S 0 CON. 0 ( TI0 )
> = 1
IRCON.1
(IEX2)
I 2 FR
IRCON.2
(IEX3)
I 3 FR
IRCON.3
(IEX4)
IRCON.4
(IEX5)
IRCON.5
(IEX6)
IEN0. 7
(EAL)
IP1. 0/
IP0. 0
IP1. 1/
IP0. 1
IP1. 2/
IP0. 2
IP1. 3/
IP0. 3
IP1. 4/
IP0. 4
IP1. 5/
IP0. 5
Interrupt
Flags
Priority
Assignment
Interrupt
Vector
Polling Sequence
Interrupt Enable
Logic and Polarity
Selection
DIO
Timer 0
Timer 1
CE_BUSY
UART0
EEPROM
XFER_BUSY
RTC_1S
EX_RTC
PLL OK
External
Source
DIO_ Rn
DIO_ Rn
I2C
> = 1
Flash
Write
Collision
> = 1
IEN2. 0
(ES1 )
IEN0. 1
(ET0 )
IEN0. 0
(EX0 )
IEN1. 1
(EX2 )
IEN0. 2
(EX1 )
IEN1. 2
(EX3 )
IEN0. 3
(ET1 )
IEN1. 3
(EX4 )
IEN0. 4
(ES0 )
IEN1. 4
(EX5 )
IEN1. 5
(EX6 )
IE_XFER
IE_RTC
EX_XFER
> = 1
EX_EEX
EX_SPI
IE_EEX
IE_SPI
IT0
IE_FWCOL1
SPI_FLAG
UART1
(optical)
0
2
1
3
4
5
6
No.
Flag= 1 means
that an inter-
rupt has oc-
curred and
has not been
cleared
EX0 – EX6 are cleared
automatically when the
hardware vectors to the
interrupt handler
byte received
byte transmitted
overflow occurred
overflow occurred
byte received
byte transmitted
accumulation
cycle completed
PLL status
changed
CE completed code run and
has new status information
DIO status
changed
DIO status
changed
every second
BUSY fell
command
received
SPI I/F
Write attempt, CE
busy
2 / 2 / 2009
IE_FWCOL0
DIO
NR_OVF
EX_FWCOL
EX_PLL
IE_PLLRISE
IE_PLLFALL
IEN_SPI
IEN_NR_
WDOVF
WD_NROVF_FLAG
CE code start,
flash write busy
WDT near
overflow
> = 1
MPU- external
sources
MPU- internal
sources
Figure 8: Interrupt Structure