Datasheet
Table Of Contents
- 1 Hardware Description
- 1.1 Hardware Overview
- 1.2 Analog Front End (AFE)
- 1.3 Digital Computation Engine (CE)
- 1.4 80515 MPU Core
- 1.4.1 Memory Organization and Addressing
- 1.4.2 Special Function Registers (SFRs)
- 1.4.3 Generic 80515 Special Function Registers
- 1.4.4 Special Function Registers (SFRs) Specific to the 71M6531D/F and 71M6532D/F
- 1.4.5 Instruction Set
- 1.4.6 UARTs
- 1.4.7 Timers and Counters
- 1.4.8 WD Timer (Software Watchdog Timer)
- 1.4.9 Interrupts
- 1.5 On-Chip Resources
- 1.5.1 Oscillator
- 1.5.2 Internal Clocks
- 1.5.3 Real-Time Clock (RTC)
- 1.5.4 Temperature Sensor
- 1.5.5 Physical Memory
- 1.5.6 Optical Interface
- 1.5.7 Digital I/O – 71M6531D/F
- 1.5.8 Digital I/O – 71M6532D/F
- 1.5.9 Digital IO – Common Characteristics for 71M6531D/F and 71M6532D/F
- 1.5.10 LCD Drivers – 71M6531D/F
- 1.5.11 LCD Drivers – 71M6532D/F
- 1.5.12 LCD Drivers – Common Characteristics for 71M6531D/F and 71M6532D/F
- 1.5.13 Battery Monitor
- 1.5.14 EEPROM Interface
- 1.5.15 SPI Slave Port
- 1.5.16 Hardware Watchdog Timer
- 1.5.17 Test Ports (TMUXOUT pin)
- 2 Functional Description
- 3 Application Information
- 3.1 Connection of Sensors
- 3.2 Connecting 5-V Devices
- 3.3 Temperature Measurement
- 3.4 Temperature Compensation
- 3.5 Connecting LCDs
- 3.6 Connecting I2C EEPROMs
- 3.7 Connecting Three-Wire EEPROMs
- 3.8 UART0 (TX/RX)
- 3.9 Optical Interface (UART1)
- 3.10 Connecting the V1 Pin
- 3.11 Connecting the Reset Pin
- 3.12 Connecting the Emulator Port Pins
- 3.13 Connecting a Battery
- 3.14 Flash Programming
- 3.15 MPU Firmware
- 3.16 Crystal Oscillator
- 3.17 Meter Calibration
- 4 Firmware Interface
- 4.1 I/O RAM and SFR Map – Functional Order
- 4.2 I/O RAM Description – Alphabetical Order
- 4.3 CE Interface Description
- 5 Electrical Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 Recommended External Components
- 5.3 Recommended Operating Conditions
- 5.4 Performance Specifications
- 5.4.1 Input Logic Levels
- 5.4.2 Output Logic Levels
- 5.4.3 Power-Fault Comparator
- 5.4.4 Battery Monitor
- 5.4.5 Supply Current
- 5.4.6 V3P3D Switch
- 5.4.7 2.5 V Voltage Regulator
- 5.4.8 Low-Power Voltage Regulator
- 5.4.9 Crystal Oscillator
- 5.4.10 LCD DAC
- 5.4.11 LCD Drivers
- 5.4.12 Optical Interface
- 5.4.13 Temperature Sensor
- 5.4.14 VREF
- 5.4.15 ADC Converter, V3P3A Referenced
- 5.5 Timing Specifications
- 5.6 Typical Performance Data
- 5.7 71M6531D/F Package
- 5.8 71M6532D/F Package
- 5.9 Pin Descriptions
- 6 Ordering Information
- 7 Related Information
- 8 Contact Information
- Appendix A: Acronyms
- Appendix B: Revision History
![](/manual/maxim-integrated/71m6531f-im-f/datasheet-english/images/img-42.png)
Data Sheet 71M6531D/F-71M6532D/F FDS 6531/6532 005
42 Rev 2
Table 39: Data/Direction Registers and Internal Resources for DIO 1-15 (71M6531D/F)
DIO PB 1 2
–
4 5 6 7 8 9 10 11 12 13 14 15
LCD Segment
– – – –
24 25 26 27 28 29 30 31 32 33 34 35
Pin number 65 60 3
–
39 40 41 42 43 44 45 46 68 30 21 22
Configuration (DIO
or LCD segment)
–
–
–
–
0
1
2
3
4
5
6
7
0
1
2
3
LCD_BITMAP[31:24]
LCD_BITMAP[39:32]
Data Register
0
1
2
–
4
5
6
7
0
1
2
3
4
5
6
7
DIO0 = P0 (SFR 0x80)
DIO1 = P1 (SFR 0x90)
Direction Register
–
1
2
–
4
5
6
7
0
1
2
3
4
5
6
7
DIO_DIR0 (SFR 0xA2)
DIO_DIR1 (SFR 0x91)
Internal Resources
Configurable
– – – – Y Y Y Y Y Y Y Y – – – –
Table 40: Data/Direction Registers and Internal Resources for DIO 17-29 (71M6531D/F)
DIO
–
17
– – – – – – – – – –
28 29
– –
LCD Segment
–
37
– – – – – – – – – –
48 49
– –
Pin number
–
13
– – – – – – – – – –
47 24
– –
Configuration (DIO
or LCD segment)
–
5
–
–
–
–
–
–
–
–
–
–
0
1
–
–
LCD_BITMAP[39:32]
LCD_BITMAP[55:48]
Data Register
–
1
–
–
–
–
–
–
–
–
–
–
4
5
–
–
DIO2 = P2 (SFR 0xA0)
DIO3 = P3 (SFR 0xB0)
Direction Register
0 = input,
1 = output
–
1
–
–
–
–
–
–
LCD_SEG48[3]
LCD_SEG49[3]
DIO_DIR2 (SFR 0xA1)
Table 41: Data/Direction Registers and Internal Resources for DIO 43-46 (71M6531D/F)
DIO
– – –
43 44 45 46
–
LCD Segment
– – –
63 64 65 66
–
Pin number
– – –
29 23 28 5
–
Configuration (DIO or
LCD segment)
–
–
–
7
0
1
2
–
LCD_BITMAP[63:56]
LCD_BITMAP[64:71]
Data Register – – –
LCD_SEG63[0]
LCD_SEG64[0]
LCD_SEG65[0]
LCD_SEG66[0]
–
Direction Register
0 = input, 1 = output
– – –
LCD_SEG63[3]
LCD_SEG64[3]
LCD_SEG65[3]
LCD_SEG66[3]
–