Datasheet

FDS 6531/6532 005 Data Sheet 71M6531D/F-71M6532D/F
Rev 2 43
1.5.8 Digital I/O – 71M6532D/F
The 71M6532D/F includes up to 43 pins of general-purpose digital I/O. These pins are compatible with 5 V
inputs (no current limiting resistors are needed). The Digital I/O pins can be categorized as follows:
• Dedicated DIO pins (4 pins):
o DIO3
o DIO56 – DIO58 (3 pins)
• DIO/LCD segment pins (a total of 37 pins):
o DIO4/SEG24 – DIO27/SEG47 (24 pins)
o DIO29/SEG49, DIO30/SEG50 (2 pins)
o DIO40/SEG60 – DIO45/SEG65 (6 pins)
o DIO47/SEG67 – DIO51/SEG71 (5 pins)
• DIO pins combined with other functions (2 pins): DIO2/OPT_TX, DIO1/OPT_RX
On reset or power-up, all DIO pins are inputs until they are configured for the desired direction under
MPU control. The pin function can be configured by the I/O RAM bits LCD_BITMAPn. Setting
LCD_BITMAPn = 1 configures the pin for LCD, setting LCD_BITMAPn = 0 configures it for DIO. Once a
pin is configured as DIO, it can be configured independently as an input or output with the DIO_DIR bits
or the LCD_SEGn registers. Input and output data are written to or read from the pins using SFR registers
P0, P1, and P2. Table 42 to Table 44 shows the DIO pins with their configuration, direction control and
data registers.
Table 42: Data/Direction Registers and Internal Resources for DIO 1-15 (71M6532D/F)
DIO PB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
LCD Segment – – – – 24 25 26 27 28 29 30 31 32 33 34 35
Pin number 92 87 3 17 60 61 62 63 67 68 69 70 100 44 29 30
Configuration (DIO
or LCD segment)
Always DIO
0
1
2
3
4
5
6
7
0
1
2
3
LCD_BITMAP[31:24]
LCD_BITMAP[39:32]
Data Register
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
DIO0 = P0 (SFR 0x80)
DIO1 = P1 (SFR 0x90)
Direction Register
0 = input,
1 = output
–
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
DIO_DIR0 (SFR 0xA2) DIO_DIR1 (SFR 0x91)
Internal Resources
Configurable
Y Y Y Y Y Y Y Y Y Y Y Y – – – –
Table 43: Data/Direction Registers and Internal Resources for DIO 16-30 (71M6532D/F)
DIO 16 17 18 19 20 21 22 23 24 25 26 27 – 29 30 –
LCD Segment 36 37 18 39 40 41 42 43 44 45 46 47 – 49 50 –
Pin number 33 12 13 64 65 66 93 54 46 43 42 41 – 32 35
Configuration (DIO
or LCD segment)
4
5
6
7
0
1
2
3
–
–
–
–
–
1
2
–
LCD_BITMAP[39:32]
LCD_BITMAP[47:40]
LCD_BITMAP[55:48]
Data Register
0
1
2
3
4
5
6
7
0
1
2
3
–
5
6
–
DIO2 = P2 (SFR 0xA0)
DIO3 = P3 (SFR 0xB0)
Direction Register
0 = input,
1 = output
–
1
–
3
4
5
–
–
– – – – –
LCD_SEG49[3] LCD_SEG50[3]
–
DIO_DIR2 (SFR 0xA1)