Datasheet

FDS 6531/6532 005 Data Sheet 71M6531D/F-71M6532D/F
Rev 2 51
Name
Address (hex)
Bit Range
Read/Write
SPI0
20B0
4, 0
RW
SPI1
20B1
4, 0
R
VERSION
20C8
7:0
R
CHIP_ID
20C9
7:0
R
TRIMSEL
20FD
4:0
RW
TRIMX
20FE
0
RW
TRIM
20FF
7:0
RW
A15 A14
A1 A0C0
0 31
x
D7 D6
D1 D0 D7 D6 D1 D0
C5C6C7x
PCSZ
PSCK
PSDI
PSDO
8 bit CMD 16 bit Address
DATA[ADDR]
DATA[ADDR+1]
7 8 23 24 32 39
Extended Read . . .
SERIAL READ
A15 A14 A1 A0C0
0 31
C5C6C7x
PCSZ
PSCK
PSDI
PSDO
8 bit CMD 16 bit Address
DATA[ADDR]
DATA[ADDR+1]
7 8 23 24 32 39
Extended Write . . .
SERIAL WRITE
D7 D6 D1 D0 D7 D6 D1 D0
x
HI Z
HI Z
(From Host)
(From 6531)
(From Host)
(From 6531)
Figure 16: SPI Slave Port: Typical Read and Write operations
Possible applications for the SPI interface are:
1) An external host reads data from CE locations to obtain metering information. This can be used in
applications where the 71M6531D/F or 71M6532D/F function as smart front-ends with preprocessing
capability. Since the addresses are in 16-bit format, any type of XRAM data can be accessed: CE,
MPU, I/O RAM, but not SFRs or the 80515-internal register bank.
2) A communication link can be established via the SPI interface: By writing into MPU memory locations,
the external host can initiate and control processes in the MPU of the 71M6531D/F or 71M6532D/F.
Writing to a CE or MPU location normally generates an interrupt, a function that can be used to signal
to the MPU that the byte that had just been written by the external host must be read and processed.
Data can also be inserted by the external host without generating an interrupt.
3) An external DSP can access front-end data generated by the ADC. This mode of operation uses the
71M6531D/F or 71M6532D/F as an analog front-end (AFE).