Datasheet
Table Of Contents
- 1 Hardware Description
- 1.1 Hardware Overview
- 1.2 Analog Front End (AFE)
- 1.3 Digital Computation Engine (CE)
- 1.4 80515 MPU Core
- 1.4.1 Memory Organization and Addressing
- 1.4.2 Special Function Registers (SFRs)
- 1.4.3 Generic 80515 Special Function Registers
- 1.4.4 Special Function Registers (SFRs) Specific to the 71M6531D/F and 71M6532D/F
- 1.4.5 Instruction Set
- 1.4.6 UARTs
- 1.4.7 Timers and Counters
- 1.4.8 WD Timer (Software Watchdog Timer)
- 1.4.9 Interrupts
- 1.5 On-Chip Resources
- 1.5.1 Oscillator
- 1.5.2 Internal Clocks
- 1.5.3 Real-Time Clock (RTC)
- 1.5.4 Temperature Sensor
- 1.5.5 Physical Memory
- 1.5.6 Optical Interface
- 1.5.7 Digital I/O – 71M6531D/F
- 1.5.8 Digital I/O – 71M6532D/F
- 1.5.9 Digital IO – Common Characteristics for 71M6531D/F and 71M6532D/F
- 1.5.10 LCD Drivers – 71M6531D/F
- 1.5.11 LCD Drivers – 71M6532D/F
- 1.5.12 LCD Drivers – Common Characteristics for 71M6531D/F and 71M6532D/F
- 1.5.13 Battery Monitor
- 1.5.14 EEPROM Interface
- 1.5.15 SPI Slave Port
- 1.5.16 Hardware Watchdog Timer
- 1.5.17 Test Ports (TMUXOUT pin)
- 2 Functional Description
- 3 Application Information
- 3.1 Connection of Sensors
- 3.2 Connecting 5-V Devices
- 3.3 Temperature Measurement
- 3.4 Temperature Compensation
- 3.5 Connecting LCDs
- 3.6 Connecting I2C EEPROMs
- 3.7 Connecting Three-Wire EEPROMs
- 3.8 UART0 (TX/RX)
- 3.9 Optical Interface (UART1)
- 3.10 Connecting the V1 Pin
- 3.11 Connecting the Reset Pin
- 3.12 Connecting the Emulator Port Pins
- 3.13 Connecting a Battery
- 3.14 Flash Programming
- 3.15 MPU Firmware
- 3.16 Crystal Oscillator
- 3.17 Meter Calibration
- 4 Firmware Interface
- 4.1 I/O RAM and SFR Map – Functional Order
- 4.2 I/O RAM Description – Alphabetical Order
- 4.3 CE Interface Description
- 5 Electrical Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 Recommended External Components
- 5.3 Recommended Operating Conditions
- 5.4 Performance Specifications
- 5.4.1 Input Logic Levels
- 5.4.2 Output Logic Levels
- 5.4.3 Power-Fault Comparator
- 5.4.4 Battery Monitor
- 5.4.5 Supply Current
- 5.4.6 V3P3D Switch
- 5.4.7 2.5 V Voltage Regulator
- 5.4.8 Low-Power Voltage Regulator
- 5.4.9 Crystal Oscillator
- 5.4.10 LCD DAC
- 5.4.11 LCD Drivers
- 5.4.12 Optical Interface
- 5.4.13 Temperature Sensor
- 5.4.14 VREF
- 5.4.15 ADC Converter, V3P3A Referenced
- 5.5 Timing Specifications
- 5.6 Typical Performance Data
- 5.7 71M6531D/F Package
- 5.8 71M6532D/F Package
- 5.9 Pin Descriptions
- 6 Ordering Information
- 7 Related Information
- 8 Contact Information
- Appendix A: Acronyms
- Appendix B: Revision History
Data Sheet 71M6531D/F-71M6532D/F FDS 6531/6532 005
68 Rev 2
The polarity of the OPT_TX and OPT_RX pins can be inverted with the configuration bits, OPT_TXINV
and OPT_RXINV, respectively.
The OPT_TX output may be modulated at 38 kHz when system power is present. Modulation is not
available in BROWNOUT mode. The OPT_TXMOD bit enables modulation. The duty cycle is controlled
by OPT_FDC[1:0], which can select 50%, 25%, 12.5% and 6.25% duty cycle. A 6.25% duty cycle means
OPT_TX is low for 6.25% of the period. The OPT_RX pin uses digital signal thresholds. It may need an
analog filter when receiving modulated optical signals.
With modulation, an optical emitter can be operated at higher current than nominal, enabling it to
increase the distance along the optical path.
If operation in BROWNOUT mode is desired, the external components should be connected to V3P3D.
Figure 36: Connection for Optical Components
3.10 Connecting the V1 Pin
A voltage divider should be used to establish that V1 is in a safe range when the meter is in MISSION
mode (see Figure 37). V1 must be lower than 2.9 V in all cases in order to keep the hardware watchdog
timer enabled. The resistor divider ratio must be chosen so that V1 crosses the VBIAS threshold when
V3P3 is near the minimum supply voltage (3.0 VDC). A series resistor (R3) provides additional hysteresis,
and a capacitor to ground (C1) is added for enhanced EMC immunity.
The amount of hysteresis depends on the choice of R1 and R3: If V1 < VBIAS, approximately 1 µA will
flow into the on-chip V1 comparator causing a voltage drop. If V1 ≥ VBIAS, almost no current will flow
into the comparator. The voltage drop will require V3P3 to be slightly higher for V1 to cross the VBIAS
threshold when V3P3 is rising as compared to when V3P3 is falling. Maintaining sufficient hysteresis
helps to eliminate rapid mode changes which may occur in cases where the power supply is unstable with
V1 close to the VBIAS threshold point.
Figure 37: Voltage Divider for V1
OPT_TX
R
2
R
1
OPT_RX
71M6531D/F or 71M6532D/F
V3P3SYS
Phototransistor
LED
10 kΩ
100 pF
V3P3SYS