Datasheet

71M6533/G/H and 71M6534/H Data Sheet FDS_6533_6534_004
80 Rev 2
Name
Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Digital I/O:
20AF
U
U
U
U
U
DIO_RRX[2:0]
DIO0
2008
DIO_EEX[1:0]
OPT_RXDIS
OPT_RXINV
DIO_PW
DIO_PV
OPT_TXMOD
OPT_TXINV
DIO1
2009
U
DIO_R1[2:0]
U
DI_RPB[2:0]
DIO2
200A
U
DIO_R3[2:0]
U
DIO_R2[2:0]
DIO3
200B
U
DIO_R5[2:0]
U
DIO_R4[2:0]
DIO4
200C
U
DIO_R7[2:0]
U
DIO_R6[2:0]
DIO5
200D
U
DIO_R9[2:0]
U
DIO_R8[2:0]
DIO6
200E
U
DIO_R11[2:0]
U
DIO_R10[2:0]
200F
R (00)
U U
DIO_PX DIO_PY
U U
UMUX_E
†
UMUX_SEL
†
DIO7/ P0
SFR 80
DIO_0[7:0](Port 0)
DIO8
SFR A2
DIO_DIR0[7:1]
U
DIO9 / P1
(Port 1)
SFR 90
DIO_1[7:5]
U
DIO_1[3:0]
DIO_1[4]
†
DIO10
SFR 91
DIO_DIR1[7:5]
U
DIO_DIR1[3:0]
DIO_DIR[4]
†
DIO11/ P2
(Port 2)
SFR A0
DIO_2[7]
U
DIO_2[5:0]
DIO_2[6]
†
DIO12
SFR A1
DIO_DIR2[7]
U
DIO_DIR2[5:0]
DIO_DIR2[6]
†
P3
SFR B0
U
DIO3[6] DIO3[5]
U
DIO3[3] DIO3[2] DIO3[1] DIO3[0]
DIO3[4]
†
Flash:
ERASE
SFR 94
FLSH_ERASE[7:0]
FLSHCTL
SFR B2
PREBOOT
SECURE
WRPROT_BT
WRPROT_CE
U
U
FLSH_MEEN
FLSH_PWE
FL_BANK
SFR B6
U U U U U
U
FL_BANK[1:0]
FL_BANK[2:0]
†
PGADR
SFR B7
FLSH_PGADR[5:0]
U
U
Real Time Clock:
RTCCTRL
2010
U
U
U
U
U
U
U
RST_SUBSEC
RTCA_ADJ
2011
U
RTCA_ADJ[6:0]
SUBSEC1
2014
SUBSEC[7:0]