Datasheet

71M6543F/71M6543G Data Sheet
104 v2
Name Location
Rst
Wk Dir Description
DIO_EEX[1:0]
2456[7:6] 0 – R/W
When set, converts SEGDIO3 and SEGDIO2 to interface with external EEPROM.
SEGDIO2 becomes SDCK and SEGDIO3 becomes bi-directional SDATA, but only if
LCD_MAP[2] and LCD_MAP[3] are cleared.
DIO_EEX[1:0]
Function
00
Disable EEPROM interface
01
2-Wire EEPROM interface
10
3-Wire EEPROM interface
11
3-Wire EEPROM interface with separate DO (SEGDIO3) and DI
(SEGDIO8) pins.
DIO_PV
2457[6]
0
–
R/W
Causes VPULSE to be output on SEGDIO1, if LCD_MAP[1]=0.
DIO_PW
2457[7]
0
–
R/W
Causes WPULSE to be output on SEGDIO0, if LCD_MAP[0]=0.
DIO_PX
2458[7]
0
–
R/W
Causes XPULSE to be output on SEGDIO6 , if LCD_MAP[6]=0.
DIO_PY
2458[6]
0
–
R/W
Causes YPULSE to be output on SEGDIO7 , if LCD_MAP[7]=0.
EEDATA[7:0]
SFR 9E
0
0
R/W
Serial EEPROM interface data.
EECTRL[7:0]
SFR 9F 0 0 R/W
Serial EEPROM interface control.
Status
Bit
Name
Read/
Write
Reset
State
Polarity Description
7
ERROR
R
0
Positive
1 when an illegal command is received.
6
BUSY
R
0
Positive
1 when serial data bus is busy.
5
RX_ACK
R 1 Positive
1 indicates that the EEPROM sent an
ACK bit.
EQU[2:0]
2106[7:5] 0 0 R/W
Specifies the power equation.
EQU[2:0]
Description
Element
0
Element
1
Element
2
Recommended
MUX Sequence
3
2 element, 4W,
3φ Delta
VA(IA-IB)/2 0 VC IC IA VA IB IC VC
4
2 element, 4W,
3φ Wye
VA(IA-IB)/2 VB(IC-IB)/2 0 IA VA IB VB IC
5*
3 element, 4W,
3φ Wye
VA IA VB IB VC IC IA VA IB VB IC VC
Note:
*The available CE codes implements only equation 5. Contact your local Maxim representative to obtain
CE code for equation 3 and 4.