Datasheet

71M6543F/71M6543G Data Sheet
16 v2
Table 2. Required CE Code and Settings for CT Sensors
I/O RAM
Mnemonic
I/O RAM
Location
I/O RAM Setting
(Hex)
Comments
FIR_LEN[1:0]
210C[2:1]
1
288 cycles
ADC_DIV
2200[5]
0
Fast
PLL_FAST
2200[4]
1
19.66 MHz
MUX_DIV[3:0]
2100[7:4]
7
See note 1
MUX0_SEL[3:0]
2105[3:0]
2
Slot 0 is IADC2-IADC3
(IA)
MUX1_SEL[3:0]
2105[7:4]
8
Slot 1 is VADC8
(VA)
MUX2_SEL[3:0]
2104[3:0]
4
Slot 2 is IADC4-IADC5
(IB)
MUX3_SEL[3:0]
2104[7:4]
9
Slot 3 is VADC9
(VB)
MUX4_SEL[3:0]
2103[3:0]
6
Slot 4 is IADC6-IADC7
(IC)
MUX5_SEL[3:0]
2103[7:4]
A
Slot 5 is VADC10
(VC)
MUX6_SEL[3:0]
2102[3:0]
0
Slot 6 is IADC0-IADC1
(IN – See note 2)
MUX7_SEL[3:0]
2102[7:4]
0
Slots not enabled
MUX8_SEL[3:0]
2101[3:0]
0
MUX9_SEL[3:0]
2101[7:4]
0
MUX10_SEL[3:0]
2100[3:0]
0
RMT2_E
2709[3]
0
Local Sensor IADC2-IADC3
RMT4_E
2709[4]
0
Local Sensor IADC4-IADC5
RMT6_E
2709[5]
0
Local Sensor IADC6-IADC7
DIFF0_E
210C[4]
1
Differential IADC0-IADC1
DIFF2_E
210C[5]
1
Differential IADC2-IADC3
DIFF4_E
210C[6]
1
Differential IADC4-IADC5
DIFF6_E
210C[7]
1
Differential IADC6-IADC7
PRE_E
2704[5]
0
IADC0-IADC1 Gain = 1
EQU[2:0]
2106[7:5]
5
IA*VA + IB*VB + IC*VC
CE Code
ce43a02
Equation(s)
5
Current Sensor Type
4 Current Transformers (CTs)
Applicable Figures
Figure 3, Figure 4 and Figure 32
Notes:
1. MUX_DIV[3:0] must be set to 0 while writing the other RAM locations in this table.
2. IN is the optional Neutral Current.
Maxim updates the CE code periodically. Contact your local Maxim representative to obtain the
latest CE code and the associated settings.