Datasheet
DS_1x66B_001 73M1866B/73M1966B Data Sheet
Rev. 1.6 33
5 SPI Interface
The host accesses the 73M1x66B using an SPI interface to write to control registers and read status
registers. The host is the master of the transaction. Four pins orchestrate the communication between
the host and the SPI, and a fifth pin is dedicated to support the daisy-chain mode. The signals are as
follows:
• SDI Serial data input driven by the host.
• SDO Serial data output driven by the 73M1x66B.
• SCLK Clock input driven by the host.
• CS Chip select input driven by the host.
• SDIT Serial data output for daisy-chain mode.
The SPI implemented by the 73M1x66B has the following key features:
• Support for 8-bit and 16-bit mode operations.
• Support for daisy-chain operations.
• Support for both continuously active SCLK or SCLK active during transfers only.
• Support for broadcast mode.
Transactions between the host and the 73M1x66B require three bytes. All bytes are transmitted most
significant byte first. The first is the control byte, the second the address byte and the third is the data
byte. The control byte is structured as follows:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
BRCT
R/W
X
X
CID[0]
CID[1]
CID[2]
CID[3]
The value of CID[0:3] determines which 73M1x66B in the daisy chain should execute the read or write
operation requested by the host. Up to 16 devices in the daisy chain can be supported. The daisy chain
organization is shown in Figure 15. The control byte is submitted to the first 73M1x66B in the daisy
chain. If the value of CID[0:3] is different from zero, the SPI of that device decreases the value of
CID[0:3] by one and passes the new value through SDIT to the next 73M1x66B in the chain. This
process continues until CID[0:3] is zero, thus stopping at the device designated to execute the operation.
The value of CID will be the position in the daisy chain for the device being addressed minus one.
If the host is controlling only one 73M1x66B, CID[0:3] must be set to 0.
The BRCT bit overrides the chip addressing driven by CID[0:3]. The host asserts BRCT for all write
operations that must be executed by all 73M1x66B devices in the chain. At that time, whatever comes in
SDI comes out through SDIT. BRCT does not affect read operations.