Datasheet

DS_1x66B_001 73M1866B/73M1966B Data Sheet

Rev. 1.6 79

12.1 Loopback Controls

Table 42 describes the registers used for loopback control.

Table 42: Loopback Controls

Function

Mnemonic

Location

Type Description

TMEN 0x02[7] W Test Mode Enable

Used to enable the activation of the test loops controlled by

the DTST bits (DIGLB1 and INTLB1).

0 = Disables DTST loops.

1 = Enables DTST loops.

TMEN has to be set to 1 before the setting of the DTST

bits.

DTST 0x07[1:0] W Digital Test Mode Select

These control bits enable DIGLB1 and INTLB1.

Prior to writing to these bits, TMEN must be set to 1.

DTST1

DTST0

Selected Test Mode

0 0 Normal (Default)

1 0 DIGLB1

1 1 INTLB1

LB 0x24[0] W Loopback

0 = Disables PCM Loopback.

1 = Enables PCM Loopback within the Host-Side Device.

TEST 0x18[7:4] W This four-bit field is used to enable the loopback mode per the

following table:

TEST

Loopback Mode

0000

Normal Mode. (Default)

Transmit and receive channels are independent.

0001

Digital Loopback Mode.

DR Transmit Bit Stream (TBS) is looped back to

receive digital channel and received at DX (DIGLB2).

0010 Remote Analog Loopback.

Receive analog signal is converted to Received Bit

Stream (RBS) and is looped back to TBS and the

analog transmit channel (INTLB2).

0011 Analog Loopback.

The transmit DR data is connected to the receiver at

the analog interface and received at the DX pin

(ALB).