Datasheet

73S1215F Data Sheet DS_1215F_003
2 Rev. 1.4
FEATURES
80515 Core:
1 clock cycle per instruction (most instructions)
CPU clocked up to 24MHz
64kB Flash memory with security
2kB XRAM (User Data Memory)
256 byte IRAM
Hardware watchdog timer
Oscillators:
Single low-cost 6MHz to 12MHz crystal
Optional 32768 Hz crystal (with internal RTC)
An Internal PLL provides all the necessary
clocks to each block of the system
Interrupts:
Standard 80C515 4-priority level structure
Nine different sources of interrupt to the core
Power Down Modes:
2 standard 80C515 Power Down and IDLE
modes
Extensive device power down mode
Timers:
Two standard 80C52 timers T0 and T1
One 16-bit timer that can generate RTC
interrupts from the 32kHz clock
Built-in ISO-7816 Card Interface:
LDO regulator produces VCC for the card
(1.8V, 3V or 5V)
Full compliance with EMV 4.1
Activation/Deactivation sequencers
Auxiliary I/O lines (C4-C8 signals)
6kV ESD protection on all interface pins
Communication with Smart Cards:
ISO 7816 UART for protocols T=0, T=1
(2) 2-Byte FIFOs for transmit and receive
Configured to drive multiple external Teridian
73S8010x interfaces (for multi-SAM
architectures)
Communication Interfaces:
Full-duplex serial interface (1200 to
115kbps UART)
USB 2.0 Full Speed 12Mbps Interface,
PC/SC compliant with 4 Endpoints:
Control (16B FIFO)
Interrupt IN (32B FIFO)
Bulk IN (128B FIFO)
Bulk OUT (128B FIFO)
I
2
C Master Interface (400kbps)
Man-Machine Interface and I/Os:
5x6 Keyboard (hardware scanning,
debouncing and scrambling)
Nine User I/Os
Up to 4 programmable current outputs
(LED)
Voltage Detection:
Analog Input (detection range: 1.0V to 1.5V)
Operating Voltage:
2.7V to 3.6V (3V to 3.6V when USB is in use)
4.75 to 5.5V for smart card supply
Operating Temperature:
-40°C to 85°C
Packages:
68-pin QFN
44-pin QFN
Software:
Two-level Application Programming Interface
(ANSI C-language libraries)
USB, T=0/T=1 and EMV-compliant smart card
protocol layers
CCID reference design and Windows® driver