Datasheet

DS_1215F_003 73S1215F Data Sheet
Rev. 1.4 61
Device Address Register (DAR): 0xFF80 Å 0x00
Table 63: The DAR Register
MSB LSB
DVADR.6 DVADR.5 DVADR.4 DVADR.3 DVADR.2 DVADR.1 DVADR.0 I2CRW
Bit Symbol Function
DAR.7
DVADR
[0:6]
Slave device address.
DAR.6
DAR.5
DAR.4
DAR.3
DAR.2
DAR.1
DAR.0 I2CRW If set = 0, the transaction is a write operation. If set = 1, read.
I2C Write Data Register (WDR): 0XFF81 Å 0x00
Table 64: The WDR Register
MSB LSB
WDR.7 WDR.6 WDR.5 WDR.4 WDR.3 WDR.2 WDR.1 WDR.0
Bit Function
WDR.7
Data to be written to the I
2
C slave device.
WDR.6
WDR.5
WDR.4
WDR.3
WDR.2
WDR.1
WDR.0