Datasheet

DS_8009C_025 73S8009C Data Sheet
Rev. 1.5 23
3.8 Chip Selection
The CS pin allows multiple circuits to operate in parallel, driven from the same host control bus. When
CS is high, the pins RSTIN, CMDVCC%, CMDVCC# and CLKIN control the chip as described. The pins
I/OUC, AUX1UC, and AUX2UC have 11 kΩ pull-up resistors and operate to transfer data to the smart
card via I/O, AUX1, and AUX2 when the smart card is activated. The signals OFF and RDY have 20 kΩ
pull-up resistors.
When CS goes low, the states of the pins RSTIN, CMDVCC%, CMDVCC, and CLKIN are latched and held
internally. The pull-up for pins I/OUC, AUX1UC, and AUX2UC become a very weak pull-up of
approximately 3 µA. No transfer of data is possible between I/OUC, AUX1UC, AUX2UC and the
smart-card signals I/O, AUX1, and AUX2. The signals OFF and RDY are set to high impedance and the
internal pull-up resistors of 20 kΩ are disconnected. With regard to de-activation, CS does not affect the
operation of the fault sensing circuits and card sense input.
CS
OFF, I/OUC,
AUX1UC, AUX2UC
CONTROL SIGNALS
FUNCTIONAL
HI-Z STATE
HI-Z STATE
t
SL
t
DZ
t
IS
t
SI
t
ID
t
DI
Figure 8: CS Timing Definitions