Datasheet

DS_8010C_024 73S8010C Data Sheet
Rev. 1.5 15
C2
22pF
C3
22pF
SDA_f rom_uC
SCL_f rom_uC
C6
100nF
SAD2
AUX1UC_to.f rom_uC
AUX2UC_to/f rom_uC
External_clock_f rom uC
VDD
R1
20K
C1
ISO7816=1uF, EMV=3.3uF
L1 10uH
R4
Rext1
SAD1
SAD0
R2 2K
R3 2K
INT_interrupt_to_uC
VDD
See NOTE 1
See
note 6
- OR -
See NOTE 5
SO28
Card detection
switch is normally
closed.
CLK track should be routed
far from RST, I/O, C4 and
C8.
See NOTE 3
NOTES:
1) VDD supply should be = 2.7V to 3.6V DC.
2) Hardwire to define address of device
3) Required if external clock from uP is used.
4) Required if crystal is used.
Y1, C2 and C3 must be removed if external clock is used.
5) Pin can not float. Must be driven or connected to GND
if power down function is not used.
6) Rext1 and Rext2 are external resistors to ground and
VDD to modify the VDD fault voltage. Can be left open
7) Keep L1 cl ose to pin 5
See NOTE 4
See NOTE 5
Low E SR (<1 00mohms) C1
should be placed near the SC
connecter contact
IOUC_to/f rom_uC
See note 7
PWRDN_f rom_uC
Y1
CRYSTAL
Note 2
Smart Card Connector
VCC
1
RST
2
CLK
3
C4
4
GND
5
VPP
6
I/O
7
C8
8
SW-1
9
SW-2
10
73S8010C
SAD0
1
SAD1
2
SAD2
3
GND
4
GND
5
VPC
6
NC
7
AUX2
12
NC
8
NC
9
PRES
10
I/O
11
AUX1
13
GND
14
CLK
15
RST
16
VCC
17
VDD_ADJ
18
SCL
19
SDA
20
VDD
21
GND
22
INT_
23
AUX2UC
28
AUX1UC
27
XTALOU T
25
XTALI N
24
I/OUC
26
R5
Rext2
C4
100nF
C5
10uF
13 Typical Application Schematic
Figure 11: 73S8010C – Typical Application Schematic