Datasheet

78M6610+PSU Data Sheet
2.13 On-Chip Calibration Routines
The 78M6610+PSU includes current and voltage and temperature calibration routines. These routines
modify gain and offset coefficients. The device also includes routines for the calibration of the X+Y
capacitor and R resistance compensation coefficients.
The user can set and start a calibration routine through the Command register. When the calibration
process completes, command register bits 23:16 (set to 0xCA to issue a calibration command) are
cleared along with bits associated with channels that calibrated successfully. Any channels that failed will
have their corresponding bit left set. After completion of the calibration, the new coefficients can be saved
into flash memory as defaults by issuing the Save to Flash Command (0xACC2xx).
2.13.1 Voltage and Current Gain Calibration
In order to calibrate the voltage and current channels, a stable AC supply must be applied to the channel
to be calibrated. The value corresponding to the applied AC supply (usually measured using a power
meter) must be entered in the relevant target register (VTarget, ITarget). Figure 2-11
shows a typical
calibration setup.
To start the calibration, the calibration command must be written to the Command register.
Initially, the value of the gain is set to unity for the selected channels. RMS values are then calculated on
all inputs and averaged over the number of measurement cycles set by the register CalCyc. The new gain
is calculated by dividing the appropriate Target register value by the averaged measured value. The new
gain is then written to the select Gain registers unless an error occurred.
On completion, the command bits are cleared in the Command register, leaving only the system setup
bits. In case of a failed calibration, the corresponding bit in the command register is left set.
During calibration, the line-lock mode should be set. Once completed, the calibration routines will store
the new gain coefficients in the relevant registers. In order to save the new coefficients into flash memory
as defaults, it is necessary to issue the Save to Flash Command (0xACC2xx).
2.13.2 Offset Calibration
The FW provide build in routines for calibration of the offset registers (Ioffs, Voffs).
To calibrate offset, all DC signals should be removed from all inputs although it is possible to do the
calibration in the presence of AC signals. In the command, the user also specifies which channel(s) to
calibrate. Target registers are not used for Offset calibration.
During the calibration process, each input is accumulated over the entire calibration interval as specified
by the CalCycs register. The result is divided by the total number of samples and written to the
appropriate offset register if selected in the calibration command. Using the Offset Calibration command
will set the HPF coefficients (HPFcoefV, HPFcoefI) to zero thereby fixing the offset registers (Ioffs, Voffs)
to their calibrated values. In order to save the new coefficients into flash memory as defaults, it is
necessary to issue the Save to Flash Command (0xACC2xx).
2.13.3 X+Y Capacitor and R Compensation Coefficient Calibration
Most applications use a line input filter to minimize the EM emissions as shown in Figure 2-11
. The
current in the filter capacitors (Icap) preceding the 78M6610+PSU cannot be measured. In order to obtain
high accuracy of the current measurement it should be compounded in the total current (Irms) calculation.
Fixed compensation coefficient values can the used, knowing the filter capacitors value. However due to
the tolerance of the filter capacitors (often ±20%), in order to obtain higher accuracy in the current
measurement, it could required to utilize a specific coefficient for each system. The 78M6610+PSU
provides a calibration routine for the X+Y capacitor compensation coefficient.
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