Datasheet

78M6610+PSU Data Sheet
Single Word SPI Reads
The device supplies direct read access to the device RAM memory. To read the RAM the master device
must send a read command to the slave device and then clock out the resulting read data. SSB must be
kept active low for the entire read transaction (command and response). SCK may be interrupted as long
as SSB remains low. ADDR[5:0] is filled with the word address of the read transaction. RAM data
contents are transmitted most significant byte first. ADDR[5:0] cannot exceed 0x3F. RAM words, and
therefore the results, are natively 24 bits (3 bytes) long.
Byte#
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0x01
1
ADDR[5:0]
0x0
2
0
3
0
4
0
Table 4-4. Single Word SPI Read Command (SDI)
The slave responds with the data contents of the requested RAM addresses.
Byte
Number
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
Hi-Z (during Read Command)
1
Hi-Z (during Read Command)
2
DATA[23:16] @ ADDR
3
DATA[15:8] @ ADDR
4
DATA[7:0] @ ADDR
Table 4-5. Single Word SPI Read Response (SDO)
Read Command[1]
Data[15:8] Data[7:0]
Data[23:16]
Read Command[0]
SCK Active
HiZ
SCK
SDI
SDO
SSB
0 0 0
Figure 4-3: Single Word Read Access Timing
Rev 3 49