Datasheet

78M6612 Data Sheet DS_6612_001
10 Rev 2
1.3 Digital Computation Engine (CE)
The CE, a dedicated 32-bit signal processor, performs the precision computations necessary to
accurately measure energy. The CE calculations and processes include:
Multiplication of each current sample with its associated voltage sample to obtain the energy per
sample (when multiplied with the constant sample time).
Frequency-insensitive delay cancellation on all four channels (to compensate for the delay between
samples caused by the multiplexing scheme).
90° phase shifter (for narrowband VAR calculations).
Pulse generation.
Monitoring of the input signal frequency (for frequency and phase information).
Monitoring of the input signal amplitude (for sag detection).
Scaling of the processed samples based on calibration coefficients.
CE code is provided by Maxim as a part of the application firmware available. The CE is not
programmable by the user. Measurement algorithms in the CE code can be customized by Maxim
upon request.
The CE program resides in Flash memory. Allocated Flash space for the CE program cannot exceed
1024 words (2 KB). The CE can access up to 2 KB of data RAM (XRAM), or 512 32-bit data words. The
CE is also aided by support hardware to facilitate implementation of equations, pulse counters and
accumulators. Usage of this hardware is firmware specific.
1.3.1 Real-Time Monitor
The CE contains a Real-Time Monitor (RTM), which can be programmed to monitor four selectable CE
DRAM locations at full sample rate
for system debug purposes. The four monitored locations can be serially
output to the TMUXOUT pin via the digital output multiplexer at the beginning of each CE code pass.
The RTM output is clocked by CKTEST.
1.3.2 Pulse Generator
The CE provides four pulse generators used to output CE status indicators (e.g. SAG) directly to
designated DIO pins.
1.3.3 Data RAM (XRAM)
The CE and MPU use a single general-purpose Data RAM (also referred to as XRAM). When the MPU
and CE are clocking at maximum frequency (10 MHz), the RAM may be accessed up to four times during
each 100 ns interval. These consist of two MPU accesses, one CE access and one SPI access.