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Simplifying System Integration

78Q8430

Driver Manual for ST 5100/OS-20

with NexGen TCP/IP Stack

March, 2008

Rev. 1.0

Summary of content (28 pages)

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Simplifying System IntegrationTM 78Q8430 Driver Manual for ST 5100/OS-20 with NexGen TCP/IP Stack March, 2008 Rev. 1.
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005 © 2008 Teridian Semiconductor Corporation. All rights reserved. Teridian Semiconductor Corporation is a registered trademark of Teridian Semiconductor Corporation. Pentium is a registered trademark of Intel Corporation. Windows is a registered trademark of Microsoft Corporation. All other trademarks are the property of their respective owners.
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UM_8430_005 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack Table of Contents 1 Introduction ......................................................................................................................................... 5 2 System Requirements ........................................................................................................................ 6 2.1 Hardware Requirements........................................................................................
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005 Figures Figure 1: NG_TSC_STRUCT Call Graph ..................................................................................................... 8 Figure 2: NET_CONTROL_STRUCT and DEV_FUNCTIONS_STRUCT Call Graph.................................. 9 Figure 3: DEVICE_CONTROL_STRUCT Call Graph................................................................................. 10 Figure 4: STETHER_CopyData Call Graph......................
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UM_8430_005 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack 1 Introduction The Teridian Semiconductor Corporation (TSC) 78Q8430 is a single chip 10/100 Ethernet MAC and PHY controller supporting multi-media offload. The device is optimized to enhance throughput and offload network protocol tasks from the host processor for demanding multi-media applications found in Set Top Boxes, IP video, and Broadband Media Appliances.
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005 2 System Requirements 2.1 Hardware Requirements The following list describes the minimum hardware requirements for a 78Q8430 ST/OS-20 based development platform: • • • • • • 2.2 78Q8430 demo board (D8430T3B_STEM). Software development PC with the following minimum requirements: Pentium® 4 CPU with 256 MB RAM and 40 GB hard drive, running either Windows® 2000 or Windows XP.
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UM_8430_005 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack 3 Device Driver Structure This 78Q8430 ST/OS-20 device driver software is a customized version of the generic Teridian Ethernet device driver software. It is configured with wrapper code for the NexGen TCP/IP protocol stack and other protocols (RTSP, RTP) to stream the MPEG-2 transport stream. The wrapper code connects the generic device driver API to the NexGen TCP/IP stack. 3.1 Device Driver Files 3.1.
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005 Table 3: NEXGEN TCP/IP Files for Hardware Checksum Directory Path C:\ipstba5\src\nexgen_drv 3.2 File Name ipncs.c (ip.c) udpncs.c (udp.c) tcpncs.c (tcp.c) File Description Add IP checksum HW/SW option Add UDP checksum HW/SW option Add TCP checksum HW/SW option ST/OS-20 Header Files The 78Q8430 device driver software requires the following ST/OS-20 header files to be included: #include #include
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UM_8430_005 3.3.2 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack NET_CONTROL_STRUCT The NET_CONTROL_STRUCT structure is defined in the TSC Ethernet source module commem.h. Figure 2 shows the call graph for the NET_CONTROL_STRUCT structure. Figure 2: NET_CONTROL_STRUCT and DEV_FUNCTIONS_STRUCT Call Graph 3.3.3 DEV_FUNCTIONS_STRUCT The DEV_FUNCTIONS_STRUCT structure is defined in the TSC Ethernet source module commem.h.
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005 misc_ctrl MISC_CTRL arc_ctrl ARC_CTRL wake_pm_ctrl WAKE_PM_CTRL ipchk_ctrl IPCHK_CTRL phy_intr_ctrl PHY_INTR_CTRL tx_stp TX_STP intr_ctrl INTR_CTRL rx_ctrl RX_CTRL tx_qsr TX_QSR DEVICE_CONTROL_STRUCT PHY_DIAG TX_CTRL phy_diag tx_ctrl MAC_CTRL mac_ctrl PHY_STATUS phy_status RMON rmon PHY_MDIX phy_mdix ARC_ENTRY arc_entry PHY_CTRL phy_ctrl DMA_CTRL dma_ctrl Figure 3: DEVICE_CONTROL_STRUCT Call Graph 10 Rev. 1.
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UM_8430_005 3.4 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack Device Driver Options Table 4 lists the configuration options for the device driver. Table 5 lists the software default values for several important 78Q8430 registers and parameters used by the driver. The file Commen.h contains these default values. To change the default values, make the changes in Commem.h and recompile the driver. A discussion of these values and how they are chosen follows the table.
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005 added to the receive QUE and the interrupt delay timer is enabled, the timer is started if it is not already running. If the interrupt delay timer is already running when data is added to the receive QUE, the running timer is not affected. When a BLOCK is removed from the receive QUE, the interrupt delay timer is reset.
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UM_8430_005 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack 4 ST IPSTB NexGen 78Q8430 Ethernet API This section shows an example of the specific integration of the 78Q8430 device driver in the STi5100 IPSTB reference design. The simple NexGen interface code (contained in the ether_tsc78q8430.c and ether_tsc78q8430.h files) connects the device driver to the NexGen TCP/IP protocol stack. The API described below is defined in the TSC driver source modules tscport.h and tscport.c.
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack 4.2 UM_8430_005 STETHER_Close () Prototype: int STETHER_Close(NGifnet *netp) Description: Driver cleanup and Ethernet controller shutdown are handled by this function. It stops the driver, deletes the task and serialization, unloads the driver and de-queues and frees any pending buffers. Parameters: netp network interface type NGethifnet_tsc Returns: NG_EOK if OK. NG_EALREADY Error if interface is not up.
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UM_8430_005 Parameters: netp 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack network interface type NGethifnet_tsc Returns: none Figure 6: STETHER_Config_ARC Call Graph 4.5 STETHER_HandleCompletedTXBuffers () Prototype: INT4 STETHER_HandleCompletedTXBuffers (NGifnet *netp) Description: This routine handles TX and error interrupts derived from tscIsr() and tscDpr(), which in turn, are the result of STETHER_Send calls for data transmission.
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005 STETHER_HandleCompletedTXBuffers STETHER_Send tsccpy tscReadReg_BUS16 tscWriteReg_BUS16 Figure 7: STETHER_HandleCompletedTXBuffers Call Graph 4.6 STETHER_InterruptHandler () Prototype: void STETHER_InterruptHandler(NGifnet* netp) Description: This function is the interrupt handler wrapper. It handles TX, RX and error interrupts derived from tscIsr() and tscDpr().
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UM_8430_005 4.7 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack STETHER_Open () Prototype: int STETHER_Open (NGifnet * netp) Description: Driver initialization begins with this function. It initializes the default configuration in the device control structure. It calls tscDeviceInit() to set up the hardware with the default configuration. Parameters: netp network interface type NGethifnet_tsc Returns: NULL if OK. err Error code in case of error.
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack 4.8 UM_8430_005 STETHER_Receive() Prototype: void STETHER_Receive(NGifnet *netp) Description: This routine checks for valid RX frames and copies their data from the 78Q8430 buffers into the system buffers. Parameters: netp network interface type NGethifnet_tsc Returns: none tsccpy STETHER_Receive tscReadReg_BUS16 tscWriteReg_BUS16 Figure 10: STETHER_Receive Call Graph 4.
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UM_8430_005 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack 4.10 STETHER_Start () Prototype: void STETHER_Start(NGifnet *netp) Description: Driver initialization occurs in this function. It copies the first available outgoing packet to the 78Q8430. It then starts TX and un-queues any TX request that it might have processed.
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005 5 STi5100 IPSTB Platform Example The STi5100 IPSTB demonstrates the 78Q8430 Ethernet driver capability in an internet streaming video application. This section describes how to set up the platform, build the driver and NexGen software, and run an example which plays and stops an MPEG2 movie. Figure 13 shows the components and connections for the STi5100 IPSTB platform.
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UM_8430_005 5.1.2 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack MPEG Video Server PC Environment Use the following procedure to set up the video server PC: STEP1: Set up the ST TSVOD server for unicast video streaming: G:\Q8430\ST_IPSTB_SW\IPBox\servers\ TS_VOD_Server STEP 2: Set up the ST Multicast server for multicast video streaming: G:\Q8430\ST_IPSTB_SW\IPBox\servers\ Multicast STEP 3: Set the video server PC IP address to 192.168.1.110.
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack 5.1.4 UM_8430_005 STi5100 IPSTB Configuration The STi5100 configuration parameters are contained in the C:\ipstba5\config\board\mb390_mem.cfg file.
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UM_8430_005 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack ST5100 FMI Clock Rate Settings The FMI clock rate settings in the file are shown below: ##TTPMOD TSC modified settings ## ## sdram refresh bank 5 ## flash runs @ 1/2 bus clk ## sdram runs @ bus clk poke -d (STI5100_FMI_GEN_CFG) 0x00000000 ## poke -d (STI5100_FMI_FLASH_CLK_SEL) 0x00000001 ##1/2 ST bus clock (50.
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005 STEP 5: Make the new code for a complete IPSTB image (create ref_ipstb.lku). ▪ Change to directory C:\ipstba5\src\ref_ipstb ▪ gmake clean ▪ gmake 5.3 Run the STi5100 IPSTB Example Use the following procedure to execute the IPSTB ref_ipstb.lku application to request an MPEG2 movie from the server: STEP 1: From the Windows Start menu, select and execute st20dev (the ST20R2.0.5 tool set).
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UM_8430_005 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack 6 Related Documentation The following 78Q8430 documents are available from Teridian Semiconductor Corporation: 78Q8430 Preliminary Data Sheet 78Q8430 Layout Guidelines 78Q8430 Software Driver Development Guidelines 78Q8430 Driver Manual for ST 5100/OS-20 with NexGen TCP/IP Stack 78Q8430 STEM Demo Board User Manual 78Q8430 Driver Manual for ARM920T Linux 78Q8430 Embest Evaluation Board User Manual 7 Contact Information For more in
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005 Appendix A – Acronyms API Fast Ethernet FTP HTTP IP MAC PC PHY RAM RMON ROM RTCP RTP RTSP STB TCP TCP/IP TELNET TSC UDP URL 26 Application Program Interface 100Mbps Ethernet LAN as defined by IEEE 802.3u File Transfer Protocol (RFC4823) Hyper Text Transport Protocol (RFC2854) Internet Protocol (RFC1112, also RFC0894) Media Access Control IEEE-802.
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UM_8430_005 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack Appendix B – Release Notes Release Notes for the 78Q8430 ST/OS-20 Driver Version 1.01, date 03/07/2008. The driver includes the following default settings: • • • Strip CRC is on. Append CRC in Tx packet is on (the NexGen stack is customized for this). Jumbo packet support is off. Release Package Contents The software release includes the following components: • • • • 78Q8430 Software User Guide for ST/OS-20 (this document).
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005 Revision History Revision 1.0 28 Date 3/28/2008 Description First publication. Rev. 1.