Datasheet
DG528/DG529
8-Channel Latchable Multiplexers
_______________________________________________________________________________________ 9
RESET
WR
CS
ADDRESS
BUS
±15V
ANALOG
INPUTS
1-OF-8
ANALOG
INPUTS
V+
+5V
-15V
+15V
V-
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
WR
RS
EN
A2
A1
A0
ADDRESS
DECODER
DATA BUS
MICROPROCESSOR
SYSTEM
BUS
7432
Figure 9. Bus Interface
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
RS
A1
GND
V+
S1B
S2B
S3B
S4B
DB
WR
A0
EN
V-
S1A
S2A
S3A
S4A
DA
TOP VIEW
10
9
DIP/SO
LCC/PLCC
DG529
14
15
16
17
184
5
6
7
8
3
2
1
20
19
9
10
11
12
13
DG528
EN
V
SS
S1
S2
S3
A2
GND
V
DD
S5
S6
A0
WR
N.C.
RS
A1
S4
D
N.C.
S8
S7
LCC/PLCC
14
15
16
17
184
5
6
7
8
3
2
1
20
19
9
10
11
12
13
DG529
EN
V
SS
S1A
S2A
S3A
GND
V
DD
S1B
S2B
S3B
A0
WR
N.C.
RS
A1
S4A
DA
N.C.
DB
S4B
N.C. = NO CONNECT
_____________________________________________Pin Configurations (continued)